ADRV9009 – xcvr clock enable failed when using 200 MHz or 400 MHz TX bandwidth profiles

Hello,

I am currently using the ADRV9009 evaluation board with a custom FPGA board based on XC7Z045-FFG676-2. My setup uses Vivado 2021.2 and VITIS 2021.2, with reference projects on the ADI GitHub repository.

The provided reference design includes three predefined transmit bandwidth profiles: 100 MHz, 200 MHz, and 400 MHz. When I use the 100 MHz profile, the initialization completes successfully. However, when I switch to the 200 MHz or 400 MHz profiles, I encounter the following error during initialization:

xcvr clock enable failed

Could you please advise what changes are required when switching between these profiles?
Am I missing any configuration related to clocking or transceiver setup?
If possible, could you confirm whether this issue is reproducible with the reference design itself, or if it might be specific to my hardware setup?

Best regards