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Is it possible to replace the VCO with an OCXO on the ADRV9009-ZU11EG on ADRV2CRR-FMC

Category: Hardware
Product Number: ADRV9009-ZU11EG, ADRV9009, ADRV9009

Hi, we have a high frequency application requiring tight frequency stability. To minimize drift:

  1. Can we simply replace the on board SoM VCXO with an OCXO?
  2. We see an reference input on the SoM and CRR boards but those paths appear to require a VCXO at the HMC7044 OSCIN. This appears to make it pointless to use an OCXO as a reference or have we misunderstood how the HMC7044 outputs are generated when provided and external reference?
  3. If option 1 is not possible, what is the recommended way to minimize frequency temperature drift?
  4. What is the onboard TCXO used for? And would that need to be replaced with an OCXO as well?

Your assistance is highly appreciated.



Add question about TCXO
[edited by: EdwardK at 11:03 PM (GMT -5) on 19 Jan 2024]

Thread Notes

Parents
  • 1. You can't replace the VCXO with an OCXO, charge pump out is coming from HMC7044 and controlling the frequency of the VCXO, another thing is note is the VCXO part used in the design is an ultra-low-noise phase oscillator, and not sure what kind of part are you planning to use.

    2. For HMC7044-related questions please open a new post with specific questions in the below forum.

    https://ez.analog.com/rf/

    3. What is your requirement for frequency drift? were you able to measure the drift with the existing design?

    4. PLL1 accepts up to four references and one of them is getting from TCXO, please refer to the HMC7044 datasheet PLL1 Reference inputs section for more details.

Reply
  • 1. You can't replace the VCXO with an OCXO, charge pump out is coming from HMC7044 and controlling the frequency of the VCXO, another thing is note is the VCXO part used in the design is an ultra-low-noise phase oscillator, and not sure what kind of part are you planning to use.

    2. For HMC7044-related questions please open a new post with specific questions in the below forum.

    https://ez.analog.com/rf/

    3. What is your requirement for frequency drift? were you able to measure the drift with the existing design?

    4. PLL1 accepts up to four references and one of them is getting from TCXO, please refer to the HMC7044 datasheet PLL1 Reference inputs section for more details.

Children
  • We looked at the HMC7044 datasheet again and the PLL1 General Description makes clear that the function of PLL1 is to lock a clean VCXO to the average frequency of one of the input references and feed it to PLL2 to generate a high quality clock for local use.

    We would have preferred a 0.5 ppm TCXO but we'll start with what comes with the SoM and use an external reference or fixed offset as required at operating temperature