Hi,I am using the hdl 'master' branch . And i am using no-os master branch. And I am using the project design for zc706 and EVAL-ADRV9008/9.
The signal power input to rx1 channel is -9 dBm to -4dBm.The agc index is around 0xfb ~0xe3.
I'm using agc peak mode. I found that sometimes the adc signal has error values while the agc changing.
How can I fix this? Thanks.