ADRV9009 RF-SOM multichip sync

Question

Hello, 
 In RF-SOM clock tree, I see 1 HMC7044 generate ref_clk and sys_ref for 2 ADRV9009. I have some questions: 
 1. How to synchronize 2 ADRV9009 with 1 HMC7044, sysref signal is 1 shot or continuous? (I have synchronized 2 adrv9009 eval board with 1 shot sysref and continuous-sysref is not ok) 
 2. Can I synchronize number of HMC7044 in 1-pulse mode? I try but it doesn't work. 
 3. 8 ADRV9009's phase difference is const every times power up or after boot, we have to calibrate again. 
 Thanks.

Vinod · Accepted Answer

The picture above is for one channel of one transceiver over multiple boot up.with respect to a constant Device clock input (plot in comparison with device clock). 
 For each transceiver we need to ensure that the device clock reaches at same time. RF PLL phase sync adjusts the phase of LO to this input clock and ensures that the phase is aligned. So it is not necessary that you do MCS at the same time. When ever MCS is done each chip synchronizes itself to the reference clock and since same reference clock is used , the relative phase between different transceivers as well get aligned.)

Vinod · Answer

We recomend Sysref to be less than or equal to device clock /64. Below post has details. 
 https://ez.analog.com/wide-band-rf-transceivers/design-support-adrv9008-1-adrv9008-2-adrv9009/f/q-a/119010/adrv9009-sysref/371676#371676

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ADRV9009 RF-SOM multichip sync

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