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Inverted FMC polarity

Thread Summary

The user encountered issues porting the ZCU102 + ADRV9002 reference design to a custom devkit using the TE0701 carrier and TE0820 SOM, due to swapped differential pairs and poor skew/length matching. The solution involved inverting the polarity in HDL using IBUFDS_DIFF_OUT and hard-coding delay values to compensate for the skew, which allowed interface tuning to pass. The user also confirmed that the internal termination circuits in the ADRV9002 do not need to be enabled, as they are already enabled in the FPGA.
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Category: Hardware

Hey all, I'm porting over the ZCU102 + ADRV9002 reference design to a custom devkit (and then down the line to a custom board). I'm using the TE0701 carrier with the TE0820 SOM. The issue is, some of the FMC differential pairs connect to the IOs with swapped polarity. I initially tried  updating the constraints file to reflect how it's physically wired, but Vivado won't let me do that as it actually does check if the physical pin's polarity matches when you use IBUFDS/OBUFDS. So next I tried updating the constraints as if the polarity was correct and just inverting in HDL, but that did not seem to work (interface tuning fails). I also know that the SSI config lets you flip ~some~ signals. But in a previous forumn post it was noted you cant flip RX I/Q individually, only TX. 

The following are flipped on my devkit: fpga_mcs_in, rx1_idata_in, rx1_strobe_in, tx1_dclk_out, tx2_strobe_out. 

What's the correct way to go about porting the reference design in this case? Where should the polarity be corrected?