ADRV9004
Recommended for New Designs
The ADRV9004 is a highly integrated, RF transceiver that has dual-channel transmitters, dual-channel receivers, integrated synthesizers, and digital signal...
Datasheet
ADRV9004 on Analog.com
We have an application using the ADRV9004 to do fast frequency hopping and requires deterministic latency between both data paths within a single ADRV.
Unfortunately, I missed reading the Multichip Synchronization section within the ADRV System Development User Guide. It appears that a source synchronize clock with the reference clock is required to feed the ADRV's MCS.
If there isn't an MCS Clock, what variation/spread in RF channel delays might we expect?
If we are providing a 200MHz reference clock, would a 5 to 10KHz 50% duty cycle clock be sufficient for the MCS clock?
Hi,
In order to have a deterministic latency between the channel, MCS clock pluses are needed and the details on pulse configuration is provided in the user guide as shown below, without MCS clock the variation in RF channel delays will be indeterministic. Please find more details on MCS related in our user guide under the section "MULTICHIP SYNCHRONIZATION".
Regards
Rahul
