Category: Hardware
Product Number: ADRV9002
Hello,
in the implementation of ADRV9002 LVDS digitized data in fabric i saw 180 degree phase between I and Q in RX1. i doubt that is more related to IO delay ? or maybe some wrong configuration is done on ADRV ?
tit happen in a customed Microchip FPGA board that i have plan to implement ADRV drivers.
BR
MGH
