Post Go back to editing

ADRV9002 Receiver Issues

Category: Software
Product Number: ADRV9002
Software Version: Vivado 2022.2

Hi Team,


                  I am using ZCU102_ADRV9002 Hardware and no_OS_2022_R2 , hdl_2022_R2. I configured 1TX1RX Mode CSSI with sampling rate of 1.92Msps and data rate of 61.44Mbps.
The no-OS  initialization prints are observed correctly. Both DAC and ADC are successfully initialized. The transmitter side (DAC) is working perfectly but at receiver side (ADC) , i added the adc_1_data_i0, adc_1_data_q0 , adc_1_data_i1, and adc_1_data_q1 of axi_adrv9001 to ILA ,, I observed Zero's most of the times and some kind of noise after some time and then again zero's in receiver output at ILA. Even though generating signal and providing it to RX side , it won't shows any affect. Are there any suggestions how to solve this issue? The RX1 is not working properly. One more thing is I am trying to program it, the following calibration is not passing

ADI_ADRV9001_INIT_CAL_RX_GAIN_PATH_DELAY 

I have masked this calibration,

but I am unable receive any data through RX port(checking I Q samples in ILA)




Thanks in advance
 Goli Ganesh



ADI_ADRV9001_INIT_CAL_RX_GAIN_PATH_DELAY
[edited by: Ganesh_Goli at 7:32 AM (GMT -4) on 28 May 2024]

Thread Notes

Top Replies

Parents
  • Hi  ,

             
                   Thank you for the response. I already went through those forums but my scenario is different here. I got  ADI_ADRV9001_INIT_CAL_RX_GAIN_PATH_DELAY 

    calibration error. Instead of 0x1BE5F7 if I mask 0x0BE5F7 , the calibration is happening properly but at the RX side the I Q data is not observed. 

    What could be the reason for 
    ADI_ADRV9001_INIT_CAL_RX_GAIN_PATH_DELAY failing. Any suggestions would be helpful to debug further. TX is working perfectly but I stuck rx side due this calibration error.


    Thanks and Regards
    Goli Ganesh
  • Hi I just moved this thread to a more appropriate forum, the design forum, your last question is a design question.

  • VANA1_1P0 , VANA2_1P0 , VTX2LO_1P0, VTX1LO_1P0 depending on use case can be NCs

    VRFLO1_1P0 connected to VRFVCO1_1P0 and a bypass capacitor of 4.7uF to ground.

    VRFLO2_1P0 connected to VRFVCO2_1P0 and a bypass capacitor of 4.7uF to ground.

    Is there any necessity to provide 1.0V to VRFLO1_1P0 and VRFLO2_1P0 ?  yes see above.

    VDDA_1P3  after programming the voltage level 1.29V is reduced to 1.22V is these accepted? No.

    VDDA_1P3 must be between 1.267V and 1.33V at all times. All supplies must be between the datasheet specification values at all times during all operations at the ADRV900x device not at the regulator.

  • Hi  ,

              Thank you for the response.

    VRFLO1_1P0 connected to VRFVCO1_1P0 and a bypass capacitor of 4.7uF to ground.

    VRFLO2_1P0 connected to VRFVCO2_1P0 and a bypass capacitor of 4.7uF to ground.


      The same connection we did in our custom schematic.

    Is there any necessity to provide 1.0V to VRFLO1_1P0 and VRFLO2_1P0 ?  yes see above.

    But how could I provide VRFLO1_1P0 and VRFLO2_1P0 to 1.0V since I already connected these two to a bypass capacitor of 4.7uF to ground. 

    You are saying both. Like VRFLO1_1P0 Connected to VRFVCO1_1P0 and a bypass capacitor of 4.7uF to ground and again you are saying provide 1.0V to VRFLO1_1P0. I can't understand. Can you elaborate and explain once.


    Thanks and Regards
    Goli Ganesh 


  • The VRFVCO1_1P0 and VRFVCO2_1P0 provide 1V output when using the internal LDO. See table 17 of datasheet.  Your original description said these were connected to ground.

  • Hi  ,

                Thank you for the response. I understood the above LDO concept.  I see voltages close to 1.0V on the internal supplies such as VRFVCO1_1P0, VRFVCO2_1P0, VRFLO1_1P0, and VRFLO2_1P0. And VDDA_1P3 before programming it is 1.32V and after programming it becomes 1.28V and it is within the datasheet spec. In our design we have not connected the VANA1_1P0 and VANA2_1P0, Is this a necessary connection? All voltage levels are within in the spec. But still I am facing ADI_ADRV9001_INIT_CAL_RX_GAIN_PATH_DELAY calibration error. Any suggestions would be helpful for further debugging.

    I also observed that the voltage on VAUXVCO_1P0 is 0V. What could be the reason for this?

    Thanks and Regards
    Goli Ganesh

  • Hi   ,

            After adrv9002_digital_init() api executed , the VAUXVCO_1P0 is 1V and then after execution of adrv9002_radio_init() api the VAUXVCO_1P0 becomes 0V. Is this happens like that or for all operations it should be 1V ?

  •  Hi   

    vivado : 2019.1 

    I am facing same issue with zedboard + adrv9002 for No_OS.

    I have generated both No-OS files and HDL from xilinx platform help. 

    I have just insert  2 ILAs in deafult HDL to see the signals in real time. one ILA for TX and second for RX as you see in the picture. 

    Zoom view

    I can see only the following messages on the SDK terminal .

    <

    Hello 

    >

    after changing GPIO_OFFSET  78 to 54 in parameters.h file 

    <#if defined(PLATFORM_MB)
    #define GPIO_OFFSET 54
    #else
    #define GPIO_OFFSET 54//78
    #endif
    >

    the message on SDK terminal 

    <

    Hello

    ADRV9002 Rev 12.0, Firmware 0.14.5.6 API version: 39.0.7 successfully initialized

    axi-adrv9002-rx-lpc: Successfully initialized (15359497 Hz)

    axi-adrv9002-tx-lpc: Successfully initialized (30718994 Hz)

    axi-adrv9002-rx2-lpc: Successfully initialized (15359497 Hz)

    axi-adrv9002-tx2-lpc: Successfully initialized (30718994 Hz)

    Bye

    >

    ILA on Tx View:

    ILA on Rx View:

    Problem:

    1. If I set on DDS then it generates single tone at 2.45GHz or If I set on DMA it shows nothing, even I applied signal at RX1 from signal generator 

    file name: headless.c 

    <

    struct axi_dac_channel tx1_dac_channels[2];
    tx1_dac_channels[0].sel = AXI_DAC_DATA_SEL_DDS;
    tx1_dac_channels[1].sel = AXI_DAC_DATA_SEL_DDS;

    >

  • Hi  

                   Actually the calibration issue is solved on removing the transformer(T203). The transformer converts single ended to differential ended of RF input ar RX side. Again if I place the transformer the calibration issue is observed. I don't know why the transformer causing calibration issue. Can you suggest what I am missing here. 

  • I sent a link to a FAQ on calibration errors. Item 6 is all RX and TX must be terminated with 50 ohms during calibration. This could be the issue. 

  • Hi  ,  ,  ,  

               Thank you for the support. Our side calibration issue was solved after placing AC coupling capacitance at Receiver Side. 


    Regards

    Goli Ganesh

Reply Children
No Data