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CSSI clock polarity in DDR mode not following cmosClkInversionEn

Category: Software
Product Number: ADRV9002
Software Version: TES 0.24.1, Device Driver 68.8.1, ADRV9002 revision C0

Hi,

We are using the CSSI on ADRV9002 in DDR, 4 lanes, 16 bits I/Q mode like this:

Using TES, we have generated C code and adjusted the value of cmosDdrPosClkEn and cmosClkInversionEn to match this configuration as explained in the "ADRV9001 System Development User Guide":

This what I have in the generated initializeinit7.c:

		.rxSsiConfig = {
		.ssiType = ADI_ADRV9001_SSI_TYPE_CMOS, 
		.ssiDataFormatSel = ADI_ADRV9001_SSI_FORMAT_16_BIT_I_Q_DATA, 
		.numLaneSel = ADI_ADRV9001_SSI_4_LANE, 
		.strobeType = ADI_ADRV9001_SSI_LONG_STROBE, 
		.lsbFirst = 0, 
		.qFirst = 0, 
		.txRefClockPin = ADI_ADRV9001_SSI_TX_REF_CLOCK_PIN_DISABLED, 
		.lvdsIBitInversion = false, 
		.lvdsQBitInversion = false, 
		.lvdsStrobeBitInversion = false, 
		.lvdsUseLsbIn12bitMode = 0, 
		.lvdsRxClkInversionEn = false, 
		.cmosDdrPosClkEn = true, 
		.cmosClkInversionEn = true, 
		.ddrEn = true, 
		.rxMaskStrobeEn = false}

Despite this configuration, the actual CSSI behavior does not always match the configuration.

Here are oscilloscope captures of the RX1 CSSI, with RX_DCLK_OUT+, RX_STROBE_OUT+ and RX_IDATA_OUT+ (RX_IDATA0_OUT).

Sometimes we get this which what we expect (rising edge of RX_STROBE_OUT with rising edge of RX_DCLK_OUT):

But sometimes we get this unexpected behavior (rising edge of RX_STROBE_OUT with falling edge of RX_DCLK_OUT):

We see that the clock polarity changes several times (between both above oscilloscope captures) while the calibration is being done by the ADRV9002, is this expected ?

Then after the calibration, the clock polarity settle on its final state, which is sometimes the wrong polarity.

Additional version information:

/* Silicon Revision: Presumed C0*/
/* */
/* Device Driver API: v0.0.0*/
/* Device Driver Client: v68.8.1*/
/* Firmware: v0.22.24*/
/* Profile Generator: v0.53.1.0*/
/* Stream Generator Assembly: v0.7.9.0*/
/* Transceiver Evaluation Software: v0.24.1*/
/* ADRV9001 Plugin: v0.24.0*/

Thanks,

Alexis Murzeau



Emphasis on the polarity changes while the calibration is being done by the ADRV9002.
[edited by: amurzeau at 1:48 PM (GMT -4) on 19 Apr 2024]