ADRV9002 Frequency hopping in FDD with independent LOs

I will look into this for you.

You can not control 2 LOs with 2 hop tables with separate GPIO pins. One way to test different configurations is with the TES tool. If the TES tool does not allow for the configuration then it is not a valid configuration.

John, thanks for your assistance. Is there any other way to independently control 2 hop talbes? I mean can LO1 be controlled via GPIO and LO2 via sequence or something? 

Hi Can you send an email to cic.americas@analog.com put it to John M in Central Applications. I would like to discuss this off line.

Hi, 

Is it possible to remain in FDD mode and frequency hop the transmitter and receiver to same LO frequency?

Thanks,

Allen

Hi Allen,

Frequency hopping is not supported in FDD mode. However, you can emulate the behavior of FDD in TDD mode by configuring the frequency hopping to Dual HOP mode. In this setup, both channels operate independently, allowing you the flexibility to assign any local oscillator (LO) to either channel.

Regards

Rahul

Hi Rahul,

Thanks for your response. I will try this out in the TES. So in this mode, could we hop our LOs and TX and RX at same time? I want to accomplish an RF loopback while hopping.

Thanks,

Allen

I was able to put in "TDD" mode, and then set pin mode and RX ENABLE and TX ENABLE pins high, and do an rf loopback using only LO one at a fixed frequency.   Can I just change to hopping and do the same thing? I see for hopping that the RX ENABLE and TX ENABLE pins are repurposed as the channel setup pins.  If I do a rising edge on both, before the hop timing signal, can i retune that LO1 , and keep both rx and tx paths enabled and do rf loopback?

Replied in this thread: Frequency Hopping in ADRV9002 - Q&A - Design Support ADRV9001 – ADRV9007 - EngineerZone 

Ok thank you. As of now though, I can't receive or transmit anything when trying to frequency hop. I'm toggling the hop signal, and using the Rx_Enable as the channel setup signal. I'm seeing all zeroes out of the adrv9002 ip core at the adc ports.