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ADRV9002 DAC resolution


What is the resolution of  DAC of ADRV9002?

The high-performance ADC is 5bits, and low Σ-Δ ADC is 16bits described in UG-1828.



  • Hi HM,

    To begin answering your question, I need to correct your second statement: The high-performance ADC is a 5-bit Continuous Time Delta Sigma ADC (CTDS ADC). The low-power ADC is a 16-bit Voltage Controlled Oscillator (VCO) architecture. 

    As for the DACs, I'm assuming you mean the DACs present on the Tx datapath? These are 16-bits wide (Please review TRANSMITTER SIGNAL CHAIN - ANALOG FRONT END (AFE) - DAC in the user guide for more details), however there are also Auxiliary DACs/ADCs which are 12-bits wide (please review AUXILIARY CONVERTERS AND TEMPERATURE SENSOR in the user guide for more details)



  • Hi, Oisin,

    Thank you for your support.

    I understand the DAC resolution.

    I made a mistake in the description of ADC. Thank you for correcting it.

    I have another question.

    What kind of architecture is the VCO architecture of the LP ADC?



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