AD9371
Recommended for New Designs
The AD9371 is a highly integrated, wideband RF transceiver
offering dual channel transmitters and receivers, integrated synthesizers, and digital signal...
Datasheet
AD9371 on Analog.com
Hello,
We are working with the ADRV9371, but we get an issue when we try to communicate by the SPI. We use the Xilinx SPI IP on a VCU108, with a Micro blaze MCU to implement the Mykonos code.
We put both Resetb and FMC_clk_resetb to one, and we have something coming out from the FPGA SPI, we checked it with a probe and everything is going through the FMC connector as it should be.
But at the moment we can’t get any response coming back from the Analog device board, but it’s working with the TES software on a ZC706. We compared the frame shape and they match (clock polarity and phases are good).
Best regards.
__CommunityServer__Service__ - Moved from TES GUI & API Software Support AD9371/AD9375 to Support AD9371/AD9375. Post date updated from Monday, April 24, 2017 5:15 PM UTC to Friday, January 30, 2026 12:11 AM UTC to reflect the move.
1)AD9371 API have all the necessary initialization you need. Please follow steps in 'headless.c' which can be generated from TES GUI. Once you fill the required FPGA configuration it should work fine and you will get error code for failures.
https://ez.analog.com/cfs-file/__key/communityserver-discussions-components-files/439/0486.a606cf2910b5315c832035cf7fa7eb65.html
2) HAL_initSpi() will initialize SPI interface for your platform.You may set chip select and spi mode in this. Keep handles ready to different spi chips selects required later while switching between them.
Hello gverma,
We are already using headless.c and everything that come with it.
We switched on a zc706 board with the same project, and now the SPI is working but the voltage level is too low to be detected by the Fpga. We can observe a signal on SPI_DOUT and the clock after a transfer on SPI_DIN, but in our project the high voltage is 1V and on the TES its 2V.
We checked the voltage on the board and everything is as it should be, there is 12V on the 12V, etc…
Is there something special to do about that?
Best regards.
Are you running the same project on ZC706+AD9371 evaluation board?
Hope you are taking care of VADJ voltage which comes from FPGA through which VDD_IF voltage is supplied to AD9371 board, below screenshot from schematics
Hello Sripad,
Yes, your project is on the ZC706 board (we first tried on VCU108) and we try to control the AD9371. I have checked the ZC706 Datasheet and Vadj should be set to 2,5V at the start of the board(maybe I have missed something).
If needed I can take control over this voltage by using an i2c protocol and change the voltage to an higher one.
Best regards,
Did you tried setting the VADJ as required for AD9371 evaluation board?
I had the problem of "the AD9371 SPI port is dead" on the Eval Board.
The problem appears to be that the reset logic is flaky, and if you just use a 10k pull-up, the !reset line goes high before the power has stabilized.
I found that the act of adding a test lead added enough capacitance for it to work 50% of the time. AFAIK, some kind of manual reset is needed.
Kind of unfortunate that the "Evaluation Board" has this bug. . .
There is no bug with the eval board reset. The eval board was released few years back and this is the first time we hear an issue with reset.
Reset not proper should not damage the SPI interface.
Reset is pulled up with 10K to 1.8V VDD_IF voltage and this voltage will come up after all the supplies are brought up .
In any case , because of the reset pin SPI interface doesn't go bad and no customers have reported this issue earlier .
Was this board working before and what change caused this failure ?