Hello,
We are having trouble with the deframer/tx path using the AD9371 - getting the error code 0x61, 0x21 etc having the "frame symbol lost" as the common denominator.
We can close to consequently reproduce the error by resetting the FPGA and then running the initialization for the JESD204B link. Additionally, we see "BADDISP" when reading "MYKONOS_deframerGetIrq". Based on the readouts, we can see that it fluctuate between CGS and ILAS phase, not reaching the DATA state.
Adding a debug core (ILA-core) to some of the signals reveal some weird behavior during the 2 deframer errors. Especially, the ilas_config_data is all 0's for the 2 errors - what might be the cause of this?
Waveform of working link:
Waveform with deframer error 0x61 (notice how the data is first sent on the second multiframe after sync?):
Waveform with deframer error 0x21 (notice the sync deassertion during the ILAS phase):
Additionally, the SYNC signal falls close to the LMFC boundary in all 3 waveforms, which in our understanding should fall somewhat in the middle of a LMF. This can controlled via the LMFC_offset, right?
We are using Vivado 2022.2 and ADI-HDL version 2022_r2:
7ea497b6c24172ee293d6e0a9a387a16973da5ce 2022_R2 https://github.com/analogdevicesinc/hdl/tree/2022_R2
Hope you can give some much needed insight into the HDL and the problem.
Thanks in advance,
Thomas
