How to config DPD on AD9375?

Donot post duplicate threads. Will be followed here:

https://ez.analog.com/microcontroller-no-os-drivers/f/q-a/164495/how-to-config-dpd-on-ad9375

HI srimoyi,

I have mistake once post this question in to that forum, then I received this answer:

"Moving to No-Os forum for comments on the DPD configuration"

Because I don't know delete that question, I have post again in this forum.

Thanks

AD9375 DPD has limited number of GMP terms and that may not work well with GaN PA's. I guess all our test reports are with LDMOS PA's.

https://www.analog.com/en/applications/technology/sdr-radioverse-pavilion-home/wideband-transceivers/digital-pre-distortion.html  --> Power Amplifier Test Report

Thanks Vinod for your infomation.

Because my system using GaN PA 's. So i try to use DPD on ad9375 at frequency that may be DPD. I implement high speed transmission 100Mbps between 2 system with have DPD and then run  between 2 system No DPD to compare. I see system NO DPD work much  better  than system HAVE DPD( speed higher).  Although spectrum of system have dpd better than no dpd and status of DPD return 0 (no error  ).

Here is spectrum of system NO HAVE DPD:

And here is spectrum of system  HAVE DPD:

Can you give me solution ?

Thanks

sonminh said:

I see system NO DPD work much  better  than system HAVE DPD

Why you say so?  The second plot with DPD seems to be better.(Have DPD)

What is the target ACLR and what is the measured ACLR after DPD? 

Yes, Vinod

The second plot with DPD seems to be better.(Have DPD). BUT I don't understand why system no have dpd run better than system have DPD.

ACLR before DPD:  -33dbc

ACLR after DPD: -45DBC

sonminh said:

BUT I don't understand why system no have dpd run better than system have DPD.

What do you mean by run better here ? 

I implement high speed transmission 100Mbps between 2 system with have DPD and then run between 2 system No DPD to compare. System no have dpd run at about100Mbps, but system have dpd only run about 10Mbps because error packet

Are you enabling disabling DPD on same hardware or different hardware boards? 

Have you measured EVM with and with out DPD ? 

Are you using CFR with DPD ? 

I enable or disable DPD on same hardware, same waveform, in same condition, only have different between have dpd and no dpd.

I have used CFR and PAR is 8dB 

What is the EVM and through put with CFR with out DPD ? 

DPD should not deteriorate EVM or increase packet loss.

Yes, although spectrum of dpd better than, but may be DPD deteriorate EVM or increase packet loss

I have tried transmit tone sine with dpd and no dpd on board 1 and then log IQ receiver on board 2. Then plot spectrum in matlab.

here is with dpd:

here is no dpd

Yes, although spectrum of dpd better than, but may be DPD deteriorate EVM or increase packet loss

I have tried transmit tone sine with dpd and no dpd on board 1 and then log IQ receiver on board 2. Then plot spectrum in matlab.

here is with dpd:

here is no dpd

Can you measure TX output on spectrum analyzer and measure EVM on both cases .? 

What is the Tx power going into Rx ? The specturm looks like the Rx is saturating or the digital input power to tX is too high .

\You can try using -6 dBFS for tone. For modulated waveforms back off digital as per PAR+ some margin.

Above plot  is 2 tone sine 3Mhz and 10Mhz is logged from RX receiver in case no DPD. (Tx output on board 1 is 2 tone sine signal  and log IQ on board 2 ). It could have harmonic but no have noises as case have dpd. I couldn't measure EVM. But why dpd make output tx be deteriorated ?

Not sure why you are measuring DPD performance with 2 tone signal. What is DPD status mykonosDpdStatus_t. 

You need to first find out Tx EVM after applying CFR No DPD . If CFR is based on hard clipping EVM & through put will deteriorate.

From the ACLR plot with DPD that you shared previously , ACLR is improving means , EVM should improve and this should not impact through put.

After applying CFR with no dpd, system run at mode custom waveform QAM64 work well with 100Mbps, So, I guess Tx EVM good.

With applying CFR with DPD, I veryfied DPDStatus every 1s. It return in order
dpdStatus.dpdErrorStatus: ,dpdStatus.dpdExtPathDelay, dpdStatus.dpdIterCount, dpdStatus.dpdMaxAdaptation, dpdStatus.dpdModelErrorPercent, dpdStatus.dpdTrackCount

DPDStatus: 0 0x740 0xC6 0x11D3 0x25 0xC6
DPDStatus: 0 0x740 0xCA 0x11D3 0x26 0xCA
DPDStatus: 0 0x740 0xCE 0x11D3 0x25 0xCE
DPDStatus: 0 0x740 0xD2 0x11D3 0x27 0xD2
DPDStatus: 0 0x740 0xD6 0x11D3 0x28 0xD6
DPDStatus: 0 0x740 0xDA 0x11D3 0x27 0xDA
DPDStatus: 0 0x740 0xDE 0x11D3 0x28 0xDE
DPDStatus: 0 0x740 0xE2 0x11D3 0x25 0xE2
DPDStatus: 0 0x740 0xE6 0x11D3 0x27 0xE6
DPDStatus: 0 0x740 0xF2 0x12CE 0x24 0xF2

Because after applying DPD, my system seems run not good as no have dpd. So i don't know how to do next. Although my system run at 20Mhz bandwidth, I still  measuring DPD performance with 2 tone signal  to can see spectrum clearly.

Can you give solution?

Without Tx output EVM plot with DPD its hard to say.

If you reduce the Tx power by 3 dB how is the performance with DPD ? 

Hi, In above test cases, I get status of mykonosVswrStatus and mykonosClgcStatus. I see both errorStatus and  trackCount return 0. Why trackCount = 0( Number of times clgc and vswr has successfull run since initialization calibration = 0)
)?. Is it affect to successfull of DPD?

CLGC and VSWR do not impact DPD. They are seperate cal. 

Your DPD iteration count is increasing , so set up required for DPD is correct. May be there is something wrong with CLGC configuration.

Hi Vinod,

In page 4 of ad9375 datasheet, specification of image rejection at 5500Mhz is 50dbm. But once I try with 3 tone signal 3Mhz, 6Mhz, 9Mhz on AD9375, It generate 3 image -3Mhz, -6Mhz, -9Mhz. and not pass specification.

How to decrease or filter 3 above image signal. How to configure AD9375 to decrease image signal?

Can you share screenshot of your measurement. Are you running QEC tracking calibration.?

With single tone , what is the level of image?

What is your application ? If its 4G/5G can you test with a 4G signal at offset and measure QEC performance with tracking cals enabled? 

Thanks

 I implement Calib DPD with:

trackingCalMask = TRACK_ORX1_QEC | TRACK_ORX2_QEC | TRACK_RX1_QEC |
                             TRACK_RX2_QEC | TRACK_TX1_QEC | TRACK_TX2_QEC | TRACK_TX1_LOL | TRACK_TX2_LOL;

 initCalMaskDpd =  TX_LO_LEAKAGE_EXTERNAL | DPD_INIT | CLGC_INIT | VSWR_INIT;

You say :"Your DPD iteration count is increasing , so set up required for DPD is correct. May be there is something wrong with CLGC configuration"

Maybe CLGC configuration not correct because I read  status of CLGC :

Both clgcStatus.errorStatus and  clgcStatus.trackCount return 0x00;

I configure Clgc by api:

    mykError = MYKONOS_configClgc(&mykDevice);
    if (mykError != MYKONOS_ERR_OK) {
        errorString = getMykonosErrorMessage(mykError);
//        goto error_11;
    }
 and clgcConfig default:

static mykonosClgcConfig_t clgcConfig =
{
    -2000,          /* (value = 100 * dB (valid range -32768 to 32767) - total gain and attenuation from Mykonos Tx1 output to ORx1 input in (dB * 100)*/
    -2000,          /* (value = 100 * dB (valid range -32768 to 32767) - total gain and attenuation from Mykonos Tx2 output to ORx2 input in (dB * 100)*/
    0,              /* (valid range 0 - 40dB), no default, depends on PA, Protects PA by making sure Tx1Atten is not reduced below the limit*/
    0,              /* (valid range 0 - 40dB), no default, depends on PA, Protects PA by making sure Tx2Atten is not reduced below the limit*/
    75,             /* valid range 1-100, default 75*/
    75,             /* valid range 1-100, default 45*/
    0,              /* 0= allow CLGC to run, but Tx1Atten will not be updated. User can still read back power measurements.  1=CLGC runs, and Tx1Atten automatically updated*/
    0,              /* 0= allow CLGC to run, but Tx2Atten will not be updated. User can still read back power measurements.  1=CLGC runs, and Tx2Atten automatically updated*/
    0,              /* 16th of an ORx sample (16=1sample), (default 0, valid -64 to 64)*/
    255,            /* Default 255 (-30dBFs=(20Log10(value/8192)), (valid range  1 to 8191)*/
    600,            /* Threshold for Tx1 in order to stop tracking, value = 100 * dB, default 6db then value = 600*/
    600,            /* Threshold for Tx2 in order to stop tracking, value = 100 * dB, default 6db then value = 600*/
    0,              /* Threshold feature enable for Tx1, 0 = disable, 1 = enable, default = 0*/
    0               /* Threshold feature enable for Tx1, 0 = disable, 1 = enable, default = 0*/
};

How to configure to run success CLGC ?