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Documents ADL5902 RMS Detector Output Voltage Clamping for High Input Power Levels
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Products Mentioned

AD8363 Recommended for New Designs
The AD8363 is a true rms responding power detector that can be directly driven with a single-ended 50 Ω source. This feature makes the AD8363 frequency...
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AD8363 on Analog.com

AD8364 Recommended for New Designs
The AD8364 is a true rms, responding, dual-channel RF power measurement subsystem for the precise measurement and control of signal power. The flexibility...
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ADL5902 Recommended for New Designs
The ADL5902 is a true rms responding power detector that has a 65 dB measurement range when driven with a single-ended 50 Ω source. This feature makes...
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ADL5902 on Analog.com

AD8362 Production
The AD8362 is a true rms-responding power detector that has a 65 dB measurement range. It is intended for use in a variety of high frequency communication...
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Table of Contents
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    • AD8363: Using INHI vs. INLO for Wideband Applications
    • ADL5902 RMS Detector Output Voltage Clamping for High Input Power Levels
    • Alternatives to  AD8362 High Range RF RMS Detector
    • Can the AD8362 Logarithmic RMS Detector accurately WiMax and LTE?
    • Operating the AD8362 Evaluation Board at Low Frequencies
    • Operating the AD8364 dual RMS Detector at frequencies below 450 MHz
    • Reducing the Response Time of an RMS Detector
    • S-Paramters for a RMS-responding RF Detectors
    • AD8363: Part-to-Part variation
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ADL5902 RMS Detector Output Voltage Clamping for High Input Power Levels

Q.

At high input power levels (above 0 dBm), the output voltage of the ADL5902 rms detectors (and some other rms detectors also) loses linearity and clamps to the rail. What causes this and is there any way to prevent it?

---------------------------------------------------------------------------------------------------------

A.

The plot below illustrates the effect you are describing. In this case, as the input power approaches +3 dBm,  the output voltage starts increasing rapidly and clamps at a level of around 4.7 V (this clamping  level varies with temperature).

This effect is caused by the internal architecture of the ADL5902.  In its normal operating mode, Vout connects to Vset. This closes an internal AGC loop which uses a VGA to present a constant input level to the internal square law detector (one of the X2 blocks).  As the input level increases, the gain control voltage to the detector (which is also the final output voltage), keeps increasing which causes the gain of the VGA to decrease. When the gain cannot be decreased any further, the AGC loop's integrator voltage (Vout) goes open loop and clamps to the rail (approx 4.7V).

If you do not want the device to behave in this manner, the most practical solution is to increase the slope of the transfer function by connecting a resistor divider between Vout, Vset and ground (as described in the datasheet). This will give higher Vout voltages for a particular input power. So you could set the slope so that the output voltage is equal to 4.6 V for an input level of +3 dBm. If you increase the input level above +3dBm the loop will still open up but the output voltage jump will be much smaller. In this example, the voltage will jump from 4.6 V to approx 4.7V (clamp level varies with temperature).

Tags: ad8362 adl5902 ad8364 ad8363
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