Q.
How can I avoid startup transients when operating the AD8318 in Controller Mode? I am using the AD8318 Log Detector/Controller to control the output level in an AGC loop. The control loop consists of a fixed-gain RF amplifier, an ADL5330 VGA, and the AD8318 Log Amp. The circuit is similar to Figure 37 on Page 16 of the ADL5330 data sheet, except with the fixed gain amplifier inserted after the ADL5330 VGA. I am seeing a startup transient at the output of the RF amplifier. During startup, the detector is seeing no signal at the amplifier output. This causes the VGA go max gain, producing the transient at the RF amplifier output that is present until the loop settles. Is it ok to short the CLPF pin to ground during startup to prevent this transient?
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A.
The CLPF node is internally fed by a current mirror. By connecting the CLPF node directly to ground, overtime a transistor in this circuit will degrade and eventually fail. The problem is the Vbceo of the transistor is exceeded.
A better solution to minimize the transient during the power up sequence is to force the VGA to minimum gain. During initialization, enable / disable the circuit using the enable pin on the ADL5330. Before enabling the VGA bring the VSET voltage on the AD8318 to 2.5 V. This translates to a power level well below the minimum detectable power of the AD8318. As a result the gain of the ADL5330 will be set to its minimum eliminating the severe overshoot.