groupUrl: https://ez.analog.com/rf/
Analog.com Analog Dialogue Wiki English
Analog.com Analog Dialogue Wiki 简体中文
EngineerZone
EngineerZone
  • Site
  • User
  • Site
  • Search
  • User
EngineerZone
EngineerZone
  • Log in
  • Site
  • Search
  • Log in
  • Home
  • Blogs ⌵
    • EZ Spotlight
    • The Engineering Mind
  • Browse ⌵
    • All Groups
    • All Members
  • Support ⌵
    • 3D ToF Depth Sensing
    • A2B
    • Aerospace and Defense (ADEF)
    • Amplifiers
    • Analog Microcontrollers
    • Analysis Control Evaluation (ACE) Software
    • Audio
    • Clock and Timing
    • Condition-Based Monitoring
    • Data Converters
    • Design Tools and Calculators
    • Direct Digital Synthesis (DDS)
    • Embedded Vision Sensing
    • Energy Monitoring and Metering
    • FPGA Reference Designs
    • Industrial Ethernet
    • Interface and Isolation
    • Low Power RF Transceivers
    • MEMS Inertial Sensors
    • Motor Control Hardware Platforms
    • Optical Sensing
    • Power Management
    • Precision Technology Signal Chains
    • Processors and DSP
    • Reference Circuits
    • RF and Microwave
    • Signal Chain Power (SCP)
    • Switches/Multiplexers
    • Temperature Sensors
    • Video
    • Wide Band RF Transceivers
    • Wireless Sensor Networks Reference Library
  • About EZ
  • More
  • Cancel
  • 主页
  • 浏览 ⌵
    • 收件箱
    • 个人设置
    • 会员
    • 专区列表
  • 论坛专区 ⌵
    • 放大器专区
    • 精密转换器专区
    • 音频专区
    • ADE电能计量专区
    • MEMS和传感器专区
    • 接口和隔离专区
    • Power 中文专区
    • ADUC微处理器专区
    • 锁相环专区
    • 开关和多路复用器专区
    • 温度传感器
    • 基准电压源专区
    • 资源库
    • 论坛使用指南
    • 技术支持参考库
    • 在线研讨会
    • 论坛社群活动
    • 论坛激励活动
  • More
  • Cancel
RF and Microwave
RF and Microwave
Documents FAQ: HMC Phase Frequency Detectors
  • Q&A
  • Discussions
  • Documents
  • File Uploads
  • Tags
  • Managers
  • More
  • Cancel
  • New
RF and Microwave requires membership for participation - click to join
  • +Documents
  • +FAQs on RF Switches & Attenuators
  • 'Must Knows' about ADI's family of Hittite PLL+VCO and Clock Timing products
  • AD8318 Temperature sensor output characteristic
  • AD8345 Pout vs. Vinbb Transfer Function
  • AD8361 RMS Responding RF Detector - Overdrive Recovery
  • AD8363: Using INHI vs. INLO for Wideband Applications
  • AD8364 Operation at 2.7 GHz
  • AD8361 Output Offset Voltage
  • ADC Noise Figure in ADIsimRF
  • ADF4107: Phase noise
  • ADF4150, ADF4150HV, and ADF4151 evaluation board control software source code
  • ADF4150, ADF4151, ADF4150HV, ADF4152HV evaluation boards software
  • ADF4155 evaluation board control software
  • ADF4158 and ADF4159 - Glitches when changing frequency
  • ADF4350 and ADF4351 Common Questions Cheat Sheet
  • ADF4350 and ADF4351 evaluation board files
  • ADF4350 S-parameters
  • ADF4355-2 and ADF5355 Evaluation Board User Guides (Preliminary)
  • ADF4360-x evaluation boards' control software source code
  • ADF9010 software
  • ADL5390 Low-End Input Frequency Limit
  • ADL5511 Response to a Multi-Carrier Signal
  • ADL5511 VRMS and VENV Response Time to VPOS Turn-On
  • ADL5601/2: Replacing Wirewound inductors with multilayer chip inductors
  • ADL5902 Vout Variation vs. Supply Voltage
  • Calculating VSWR using dual Linear-in-dB RMS Detecto
  • Changing the ADF410X output channel without a glitch?
  • Command line register writer for CyUSB PLL evaluation boards
  • connecting output of AD9854 DDS to ADL5375-05 modulator
  • Digital Lock Detect output from the ADF4106 is not indicating lock correctly, why?
  • Explain how the ADF41XX datasheet PLL noise is specified?
  • FAQ on Hittite Microwave RF/MW Amplifiers from ADI
  • FAQ: 1/f Noise for the ADL5387, ADL5382, and ADL5380
  • FAQ: AD8302 Gain and Phase with no Input Signal
  • FAQ: AD8302 Gain/Phase Detector, Response to Modulated Signals
  • FAQ: AD8302 Gain/Phase Detector: Operation as a Frequency Discriminator
  • FAQ: AD8309 Limiter impedance
  • FAQ: AD8309 Limiter output swing
  • FAQ: AD8340, AD8341, and ADL5390 Vector Modulators: IBBP, IBBM, QBBP, and QBBM Input Impedance to Ground
  • FAQ: AD8348 and ADL5387 maintains performance at low frequencies
  • FAQ: AD8362 RMS Detector: Equations for RMS Averaging Capacitor and Corner Frequency of Offset Control Loop
  • FAQ: AD8370 dc coupled with dual supplies
  • FAQ: ADF4153 DLD ( Digital Lock Detect )
  • FAQ: ADL5380 Performance below 400 MHz.
  • FAQ: ADL5511 No Connect (NC) Pins
  • FAQ: ADL5801 Low Frequency Operation
  • FAQ: ADL5801 Mixer Performance when driven single-ended on both its RF and LO ports
  • FAQ: ADL5802 Low Frequency Operation
  • FAQ: ADL5902 Part-to-Part Supply Current Variation
  • FAQ: ADL5902 RMS Detector Output Voltage Clamping for High Input Power Levels
  • FAQ: ADL5902 RMS Detector: Operation at Frequencies greater than 5.8 GHz
  • FAQ: AGC Response Time of AD8368 VGA  
  • FAQ: Alternatives to  AD8362 High Range RF RMS Detector
  • FAQ: Are S-parameter files available for ADI's RF/IF gain blocks?
  • FAQ: Baseband Bandwidth of ADL5375 Broadband IQ Modulator
  • FAQ: Calculating the Output Power of DAC/IQ Modulator Combination
  • FAQ: Calculating the Resistor Values to Alter the Slope of a RF Log Amp or RMS Detector
  • FAQ: Can AD8346 be operated at frequencies below 800 MHz?
  • FAQ: Can HMC589 be operated below 4V?
  • FAQ: Can the AD8362 Logarithmic RMS Detector accurately WiMax and LTE?
  • FAQ: Determining the Correct Value for Decoupling(Bypass) and AC-Coupling Capacitors
  • FAQ: Disabling the AD608's Mixer/Amplifier and operating just the Log Amp/Limiter
  • FAQ: Extending the VCO tuning range of the ADF4193 ultra fast settling PLL
  • FAQ: Getting New Devices into ADIsimRF
  • FAQ: HMC Microwave Frequency Dividers by Analog Devices
  • FAQ: HMC Phase Frequency Detectors
  • FAQ: How can I avoid startup transients when operating the AD8318 in Controller Mode?
  • FAQ: How can I get the rms detector to accurately detect the power during a pulse modulated signal input?
  • FAQ: How does a serial gain setting get latched into the AD8366?
  • FAQ: How Does the Drain Current of HMC634LC4 change as the Gate Voltage approaches 0V?
  • FAQ: Is it Possible to reduce the gain of the ADL5602?
  • FAQ: Is there a Performance Benefit Associated with Driving the ADL5375 Local Oscillator Input  Differentially?
  • FAQ: Long Term Drift of RF Detectors
  • FAQ: Low Frequency Operating Limit for AD8370 Digitally Controlled VGA
  • FAQ: Maximum Junction Temperature of AD831
  • FAQ: Measuring the Compression Point (OP1dB) of IQ Modulators
  • FAQ: OP-AMP choice for active PLL loop filters
  • FAQ: Operating RMS Detectors at Low Frequencies
  • FAQ: Operating the AD8362 Evaluation Board at Low Frequencies
  • FAQ: Operating the AD8364 dual RMS Detector at frequencies below 450 MHz
  • FAQ: Operation of AD8375 and AD8376 Digitally Controlled VGAs at Low Frequency
  • FAQ: PLL Normalized phase noise floor and 1/f phase noise
  • FAQ: Reducing the Response Time of an RMS Detector
  • FAQ: RF Connectors used on ADI Evaluation Boards
  • FAQ: RF Detector Recommendations
  • FAQ: S-Parameters
  • FAQ: The ADL5240_ADL5243 DSA control interface voltage thresholds and Byte(8 bits) opeation
  • FAQ: The Ultimate Guide to the ADF5355 Microwave Wideband Synthesizer
  • FAQ: Thermal Resistance of LFCSP packages used in ADL5370/1/2/3/4/5 Modulators
  • FAQ: Typo Error at ADL5373/4/5 datasheet
  • FAQ: Understanding ADL5380 IQ Demodulator EVM Performance Plots
  • FAQ: Using Standard S-Parameter Files In Eagleware(Genesys)
  • FAQ: We have several AD8361s and all exhibit different levels of output voltage with no RF signal present. Is this normal?
  • FAQ: What are the precautions to prevent latch-up on the AD8375?
  • FAQ: What is the AGC loop settling time of the AD8347 for a pulsed RF input?
  • FAQ: What is the Channel To Channel Isolation of the ADRF6520. 
  • FAQ: What is the insertion phase change of the ADL5330 as the gain control voltage is varied?
  • FAQ: What is the low frequency operating limit for ADL5385 and ADL5386?
  • FAQ: When I adjust the dc bias level on the I and Q inputs of my IQ Modulator, I see no change in the LO Leakage. What am I doing wrong?
  • FAQ: When I use the Auxiliary DACs to compensate for IQ Mod LO Leakage, what resistor tolerance should I use?
  • FAQ: Why do you typically recommend using a 10uF series capacitor at the baseband output of an IQ demodulator?
  • FAQ: Why use a PLL architecture that supports High Voltage VCOs?
  • FAQ:  How should I terminate the RFoutA and RFoutB pins on the ADF4350?
  • FAQ:  I cannot load the ADF7021-N .txt file generated by SRD Design Studio into the evaluation tool.
  • Frequency Hopping with Hittite PLLVCO's
  • Gerber files for the HMC778LP6CE evaluation board
  • HMC-ABH241 : Die Related- Queries
  • HMC1020 SCI1-4 Configurations
  • HMC292A HMC292 Additional Data
  • HMC451 pHEMT process
  • HMC557A additional data
  • HMC558A addtional data
  • HMC685LP4 Additional Data
  • HMC686LP4/686LP4E Addtional Data
  • HMC773ALC3B additional data
  • HMC832LP6GE vs HMC830LP6GE comparison
  • How Can  I View Gerber files?
  • How do I obtain a footprint for ADI components?
  • How do I use the SPI Mode Selection feature on HMC PLL's & PLLVCO's?
  • Int-N PLL evaluation boards' control software source code
  • Looking for a High Range RF RMS Detector that will Operate at Low Input Frequencies
  • LTC694x Loop Filter Design and Simuation
  • On the HMC611LP4, how does the temperature sensor pin (Pin 3) work?
  • Opening the .pcb file in the Gerber folder of HMC624ALP4E
  • Operating the ADL5535/6 with a lower value of choke inductor
  • Phase detector of the HMC807LP6CE does not work - 3
  • Phase resync, phase programmability and phase coherence between multiple Fractional-N PLLs
  • PLL USB adapter board not connecting/programming
  • Problem Installing ADIsimRF Rev. 1.7
  • Pulse Response of Linear-in-dB RMS Detectors with no RMS Averaging Capacitor Present
  • Q: What happens to the PLL when the REFIN is removed ?.
  • Question about HMC406MS8G
  • Re: ADL5380 DSB NF Measurement
  • Replacing ADF4001 with ADF4002
  • RF & Microwave INTRO
  • RF Detector Flatness vs. Frequency
  • RF Detector Overdrive
  • S-Parameters for ADL5511 RF Input
  • S-Paramters for a RMS-responding RF Detectors
  • Solution: Mixer output noise with ADL5802 Demo Board - varying Supply Current
  • Switching an RF Detector between Measurement Mode and Controller Mode
  • Temperature Drift of IQ Modulator LO Leakage after Calibration at 25 degC
  • The ADL5336 has a low frequency oscillation.  How do I fix this?
  • Threshold voltage to disable the ADL5801/2
  • Video: Using ADIsimPLL to simulate frequency ramps on the ADF4158
  • What is the Group Delay of the AD8340 and AD8341?  How does is change over gain?
  • What is the recommended Write Sequence for the ADF41XX after power-on?;
  • What is the tuning port capacitance and modulation bandwidth for the HMC587LC4B?

FAQ: HMC Phase Frequency Detectors

With Analog Devices’ acquisition of Hittite Microwave Corporation came several new Phase Frequency Detector products. These useful building blocks are implemented when designing phase locked loop synthesizers for microwave radios for point to point, military, satellite and SONET applications. This FAQ attempts to address some of the common questions regarding these devices.

Question:  What part numbers make up this product line?

Answer:  The HMC439QS16GE and HMC3716LP4E; complementary
parts that include a counter are the HMC440QS16GE and HMC4069LP4E respectively.

_____________________________________________________________________________________

Question:  Are these available as die?

Answer:  Yes, the HMC3716 has been made available as “untested” die. Please contact the factory for additional information.

_____________________________________________________________________________________

Question:  Is hermetic packaging an option?

Answer:  Yes – please contact the factory for more information.

_____________________________________________________________________________________

Question:  Are these available as “non-RoHs” or “lead” parts for military and aerospace applications?

Answer:  Yes. The HMC439LP3G is available as a “non-RoHs” or “lead” part and the HMC3716LP4E may be as well. Please contact the factory for availability and pricing.

_____________________________________________________________________________________

Question: What process do these parts utilize?

Answer: The HMC439QS16GEQS16GE and HMC3716LP4ELP4E are built on a GaAs HBT process.

_____________________________________________________________________________________

Question:  What are the pros and cons of this process?

Answer:  One of the primary differences between processes is where the 1/f or “flicker” noise corner falls. The GaAs process has a flicker corner of about 3 kHz. This results in improved close in phase noise  (at offsets less than 3 kHz) due to the inherent 30dB / decade noise slope at offsets between the carrier and the flicker corner. By comparison, the flicker corner in the SiGe process falls closer to 10kHz and will have slightly worse close in phase noise but better performance at 100kHz and beyond. The GaAs process also has a well established reliability for space applications.

_____________________________________________________________________________________

Question:  What is the ESD rating of these devices?

Answer:  The HMC439QS16GE is Class 0 (HBM) while the HMC3716LP4E is Class 1B (HBM) / Class C2 (CDM) and are easily damaged. ESD precautions should be strictly followed during all handling operations to prevent damage to the device.

_____________________________________________________________________________________

Question: What is the input impedance of the HMC439QS16GE and HMC3716LP4E devices?

Answer: The HMC439QS16GE and HMC3716LP4E provide a 50 ohm differential impedance at the REF and VCO ports. 

_____________________________________________________________________________________

Question:  What are the differences between the HMC439QS16GE and the HMC3716LP4E?

Answer:  

  1. The HMC3716LP4E integrates the pull-up resistors that are required on the HMC439QS16GE at the U / D and NU / ND output pins and has       eliminated the U/D output.

  2.  Lock Detect and Invert functionality have been added to the HMC3716LP4E.

_____________________________________________________________________________________



Question: Is it possible to drive the HMC439QS16GE or the HMC3716LP4E single ended?

Answer:  Yes – just AC ground the unused port (no need to add a 50Ω resistor).

_____________________________________________________________________________________

 

Question:  What is the benefit of using the differential input?

Answer:  Other than increased input power (3dB higher vs. single ended) and improved isolation due to differential operation there's no difference in performance.

_____________________________________________________________________________________



Question:  Is it possible to convert the differential output to single ended so a passive loop can be used?

Answer:  No, the output was designed to drive a high impedance load, specifically an op amp. It’s unable to source any current. Differential outputs in conjunction with an active loop are required in order to provide a stable phase locked source with minimal spurs as well as provide
the means to tune the VCO both up or down as needed in order to retain lock.

_____________________________________________________________________________________

Question:  I only need 2 Volts of tuning; can I drive the VCO tune port directly?

Answer:  No, the outputs are unable to source any current and were designed specifically to operate differentially. The pulses that simultaneously appear on the outputs provide a cancellation effect which helps to minimize spurs.

_____________________________________________________________________________________

Question:  How is the invert (INV) functionality of the HMC3716LP4E used?

Answer:

  1. Normal Mode: If VCO frequency > REF: ND is the active output. 
  2. Invert Mode: If VCO frequency > REF: NU is the active output.
  3. Invert mode could provide a physical layout advantage if swapping the inputs is helpful for layout reasons.  Swap VCO and REF at input and continue to use ND as the output.

____________________________________________________________________________________

Question:  Does the invert function invert the logic levels as well?

Answer:  No.

____________________________________________________________________________________

Question:  What should I do with the INV pin on the HMC3716LP4E if I don’t need the invert functionality?

Answer:  Simply tie it to ground.

____________________________________________________________________________________

Question:  Do you have a lock detect circuit you can recommend for the HMC439QS16GE?

Answer:  No. If lock detect functionality is needed then we recommend the HMC3716LP4E.

____________________________________________________________________________________

Question:  How do I implement the lock detect functionality on the HMC3716LP4E or HMC4069?

Answer:  The LD pin utilizes an open collector configuration and must be pulled up to Vcc via an external 1k Ohm resistor.
It’s also recommended to add a series 100Ω resistor to limit surge current followed by a shunt capacitor to provide the desired logic level for the reference frequency being used.

____________________________________________________________________________________

Question:  If I power these devices down, what state do they “wake up” in?

Answer:  The turn on state is random however in just a few clock cycles the circuit figures out where it needs to be and provides the
appropriate output.

____________________________________________________________________________________

Question:  Can I use these devices as a phase detector?

Answer:  No. Customers who've tried this have noticed that there is hysteresis associated with the output phase error and amplitude.  This is because these are phase frequency detectors – not phase detectors and are designed for use in a PLL synthesizer. We recommend using a mixer instead as it has no hysteresis and will provide the +/- voltage swing that is desired.

____________________________________________________________________________________

Question:  What is the temperature drift of the output voltage for these devices?

Answer:  This generally isn't a concern for the primary application for these parts so this parameter wasn't characterized. If
the HMC439QS16GE is being used, the Tc of the external pull-up resistors could be minimized.

____________________________________________________________________________________

Question:  On the HMC439QS16GE can I use the U / D pins instead of the NU / ND pins?

Answer:  Only if you're willing to take a 6 dB degradation to the phase noise performance.

____________________________________________________________________________________

Question:  Why is there a 6dB phase noise degradation at the U / D pins on the HMC439QS16GE?

Answer:  The U / D pins are “On” most of the time and operate at current levels that are an order of magnitude higher than the NU /
ND pins. This degrades the phase noise on these pins by 6dB.

____________________________________________________________________________________

Question:  Why were the U / D pins eliminated on the HMC3716LP4E?

Answer:  The HMC3716LP4E includes lock detect functionality so they aren't needed. Furthermore, use of resistor values greater than 20 ohms on these pins results in phase noise degradation.

____________________________________________________________________________________

Question:  Can I alter the value of the pull-up resistors on the output pins (U, D, NU, ND).

Answer: No. These have been optimize for phase noise performance and set the output voltage swing of 2V, swinging between 3Vdc and 5Vdc.

____________________________________________________________________________________

Question:  How does the phase noise scale?

Answer:  The residual or additive phase noise scales at 10*LOG (f / fo) where f > fo.

____________________________________________________________________________________

Question:  What waveform should I use for the best phase noise?

Answer: A waveform with a high slew rate (square wave) will always provide the best phase noise at reference frequencies below 100MHz.

____________________________________________________________________________________

Question:  What is the minimum slew rate for frequencies below 100MHz?

Answer: We haven't characterized these parts to determine the minimum slew rate.

____________________________________________________________________________________

Question:  How can I synthesize a loop filter if I use these parts?

Answer:  Follow the link below for step by step instructions on how to use the legacy HMC PLL Design tool to synthesize a loop filter when using legacy HMC products that output directly from the phase frequency detector.

Link:  https://ez.analog.com/message/177133#177133

____________________________________________________________________________________

  • hmc3716
  • HMC3716LP4ELP4E
  • HMC4069LP4E
  • HMC3716LP4E
  • HMC440QS16GE
  • HMC439QS16GEQS16GE
  • hmc4069
  • HMC439LP3G
  • HMC439QS16GE
  • Share
  • History
  • More
  • Cancel
Comments
Anonymous
Related
 
社交网络
快速链接
  • 关于ADI
  • Partners
  • 模拟对话
  • 职业
  • 联系我们
  • 投资信息
  • 新闻中心
  • 质量和可靠性
  • 办事处与代理商
  • Analog Garage
语言
  • English
  • 简体中文
  • 日本語
  • Руccкий
电子快讯

欲获得最新ADI产品、设计工具、培训与活动的相关新闻与文章,请从我们的在线快讯中选出您感兴趣的产品类别,每月或每季度都会发送至您的收件箱。

订阅
Switch to mobile view
Analog Logo
© 1995 - 2022 Analog Devices, Inc. All Rights Reserved 沪ICP备09046653号-1
  • ©
  • 1995 - 2022 Analog Devices, Inc. All Rights Reserved
  • 沪ICP备09046653号-1
  • 网站地图
  • 隐私和保密政策
  • 隐私设置
  • 使用条款
 
Social
Quick Links
  • About ADI
  • Partners
  • Analog Dialogue
  • Careers
  • Contact us
  • Investor Relations
  • News Room
  • Quality & Reliability
  • Sales & Distribution
  • Analog Garage
Languages
  • English
  • 简体中文
  • 日本語
  • Руccкий
Newsletters

Interested in the latest news and articles about ADI products, design tools, training and events? Choose from one of our 12 newsletters that match your product area of interest, delivered monthly or quarterly to your inbox.

Sign Up
Switch to mobile view
Analog Logo
© 1995 - 2022 Analog Devices, Inc. All Rights Reserved 沪ICP备09046653号-1
  • ©
  • 1995 - 2022 Analog Devices, Inc. All Rights Reserved
  • 沪ICP备09046653号-1
  • Sitemap
  • Privacy & Security
  • Privacy Settings
  • Terms of use
EngineerZone Uses cookies to ensure you get the best experience in our community. For more information on cookies, please read our Privacy & Security Statement.