How to understand the figure “PLL LOCK vs TIME” in page 7 of MAX2870 datasheet

In this figure, the output is set to 3GHz, from time 0 to ~70us, that is in VCO selection. After that, if FASTLOCK mode enabled, the output will be locked immediately. Otherwise, it needs another ~100us to lock.

What is the MAX2870 delay to enable/disable the output signal via RFOUT_EN pin (Pin 26)?

The delays are shown in the following two waveforms. The first waveform is showing from on to off, showing the delays. The second waveform is showing from off to on.

The MAX2870 datasheet shows that, if BDIV=0, the frequency of RFOUTB is the same as RFOUTA. Is it possible to deactivate RFOUTA and use only RFOUTB, but still having the frequency of RFOUTA at RFOUTB?

The RFA_EN (register 4, bit 5) and RFB_EN (register 4, bit 8) or pin RFOUT_EN just control the last output stage (please see attached) enable or disable, the dividers will keep working even RFOUTA disabled, so we can get the same frequency configuration for RFOUTB as RFOUTA even RFOUTA disabled.

Is there a procedure for changing the MAX2870, MAX2871 output frequency?

To change the output frequency, first turn-off the outputs, then change PLL register settings. Loading the outputs while changing register parameters may cause enough reflections to interfere with the PLL locking process. The GUI algorithm does NOT perform this procedure and must be implemented manually. Below is a summary of the procedure: Turn-off both OUTA and OUTB (i.e. REG4[BIT5] = REG4[BIT8] = 0) Change PLL register settings Turn-on desired outputs (i.e. REG4[BIT5] = 1 and/or REG4[BIT8] = 1)

How do I select the choke inductor for MAX2870 and MAX2871 outputs?

For maximum output power, the impedance of the choke should be about 50Ω at the frequency range of interest. Tight tolerance and low DC resistance are highly recommended for accurate channel matching. The single-ended output level can be up to +5dBm (typ.) in the GHz range. At lower frequencies, the output power starts to drop. For wide band frequency applications, a 50Ω pull-up resistor is recommended. This will allow for a wider frequency range on the output.

What is the digital input logic level range for the MAX2870?

The MAX2870 digital logic is powered from the VCC_DIG pin, and the valid input voltage range for this supply is +3.0V to +3.6V. It is intended for use with +3.3V input supplies with +/-10% tolerance. The absolute maximum voltage for all pins is VCC_ + 0.3V. The evaluation kit schematic has buffers between the microcontroller and the MAX2870 as the microcontroller is powered directly from the +5V USB input and the MAX2870 is powered from a user-supplied +3.3V.

After putting MAX2870 into low-power mode via CE pin or writing to the register (setting SHDN = 1), is it necessary to set the registers again after exiting low-power mode?

The device retains the register settings when placed into low-power mode through software or hardware. After exiting low-power mode, there is no need for a full initialization unless the customer resets the registers manually.

Which register bits enable/disable the MAX2870 RF outputs (i.e. RFOUTA/RFOUTB)?

The RF outputs (i.e. RFOUTA/RFOUTB) are enabled/disabled using bits 5 and 8 in register 4. There are two typos on page 13 of the datasheet (document number 19-6250; Rev 6; 4/17) that state, "Register 4, set bit 4 and 8 to 0 to keep RFOUT disabled". The actual step should read, "Register 4, set bit 5 and 8 to 0 to keep RFOUT disabled."

What are the differences between MAX2870 and MAX2871?

There are several differences between the MAX2870 and MAX2871, outlined below: Specification Condition MAX2870 MAX2871 Reference Input Frequency (MHz) Max. 200 210 Maximum PFD Frequency (MHz) INT mode FRAC mode 105 50 140 125 3.0 GHZ VCO Open Loop Phase Noise (dBc/Hz) @ 10MHz offset -155.0 -158.0 4.5 GHz VCO Open Loop Phase Noise @ 10MHz offset -151.0 -153.0 6.0 GHz VCO Open Loop Phase Noise @ 10 MHz offset -150.0 -151.0 Integrated RMS Jitter (ps) 0.250 0.200 Normalized In-Band Noise Floor (dBc/Hz) -266 int -230 int 1/f Noise (dBc/Hz) -95.0 -122.0 2nd Harmonics (VCO/2) dBc -20 -25 Temperature Sensor & ADC NO YES Temperature Compensation from -40C to +85C NO YES Phase Synchronization NO YES Cycle-Slip Reduction and Fast Lock NO YES Mute Until Lock NO YES Muted Output Power -31.0 -40.0 Total Supply Current at Highest Frequency (mA) 162 182