Question
The Base Band inputs IAIN, QAIN and detectors VDT1/VDT2 should be biased with
Vref (1V). When biasing these pins from another source which is also ~1V, I see
a failure in the AGC loop, it gets stuck at the minimum gain (VAGC = 3V).
What could be the cause of this strange behavior?
Answer
The internal VREF is very well controlled and your applied voltage can never be
as quite or clean as the chip’s band gap voltage. The mixer AGC output level
is only 24 mVppk therefore if there is any noise or offset on the your applied
voltage then the AGC will be set to the minimum as you are observing. Refer to
Figure 34. You will need to use the chip’s internal VREF for the application
to work properly.