What is the difference between ADF4153A and ADF4153?

Question What is the difference between ADF4153A and ADF4153? Answer 1.The ADF4153A is a new part. It is conveniently pin compatible with the older ADF4153 so that if customers want to drop in this new part, they can without a board change. It’s up to the customer if they want to re-qual or not. 2.The charge-pump was redesigned to give better 1/f noise. The charge-pump and PFD were the only part of the ADF4153A that was redesigned. Everything else including the layout was left the same as the ADF4153 design 3.ADF4153A is pin for pin and software compatible to the previous ADF4153. 4.There is a change in the Rset value to have charge pump current setting of Icp = 5mA. 5.In ADF4153A, Rset = 4.7k to have Icp = 5mA. In ADF4153, Rset=5.1k to have Icp=5mA. 6.Rset range is 3k-10k in ADF4153A, while it is 1.5k-10k in ADF4153.

What are the maximum rise/fall times for the ADF4153's CLK, DATA and LE signals?

Question What are the maximum rise/fall times for the ADF4153's CLK, DATA and LE signals? Answer The maximum rise/fall times should not exceed 1uS for the CLK, DATA and LED signals.

ADF4153 DLD ( Digital Lock Detect )

Q. Why doesn't DLD (Digital Lock Detect) work on the ADF4153 for PFD frequencies higher than 15MHz? ------------------------------------------------------------------------------------------------------------------------ A. For PFD frequencies higher than 15MHz the accuracy of digital lock detect is compromised. The reason for that is that the period of high pfd frequencies gets close to the digital lock detect window. Taking for example an application that uses a Fpfd = 28Mhz, the period is around 35ns. The DLD window is 15ns. In an unlocked state the phase error is very low and might not get outside the 15ns window. The only solution is to either decrease Fpfd or use Analog Lock Detect. This FAQ was generated from the following discussion: ADF4153 DLD ( Digital Lock Dectect )