Old and new UG-123 differences

Question We have found some changes on pages 7 & 8 of the old UG-123 (attached). For this old version, you could enter the frequencies instead of the CLK values. Is there a tool for calculating CLK1, CLK2, etc? (otherwise they would write a Matlab-Script). It would make the calculations slightly easier. Answer It was found to be more useful for the user to decide the DEVIATION, DEV_OFFSET, CLK1, CLK2, and STEPS, and then have the software calculate the resulting frequencies and times. This is in the latest software: http://ez.analog.com/message/55190#55190 If you want to go the opposite direction, you will need to write a script or manually do the calculations. The relevant formulae are equations 9 – 15 in the ADF4158 data sheet.

ADF4158 eval SW hidden feature

Question If I observed it well, your ADF4158 software has a small error. On Figure 41 of the data sheet of ADF4158 it is shown that the Ramp status can be output via the Mux-Out. After setting this in the software, something will be written only to Register 0 , and not in Register 4 as indicated (especially Register 4 DB [25: 21]). I would need the signal to trigger when recording. Can you confirm this error? If yes -> do you have a workaround or solution? Answer The solution is to: • Double-click the black ANALOG DEVICES (bottom, center of the application). • This will reveal some hidden features – including the PLL Testmodes option. The option contents Register 4, DB[25:21]. • Setting this option to 03. Ramp comp to Muxout will give the required performance. Note: Muxout must also be set to Ramp Status.

Question Which is the ramp triggering pin on the ADF4158? I couldn’t find any. The nearest guess for me would be the LE pin (load enable on the serialinterface), assuming that the last command written was to set the “Ramp ON” bit in R0. Is my assumption correct? Would it in that case be necessaryto shift-in again the 32 bits to R0 in order to repeat the same ramp? Or is it sufficient to pulse the LE pin? (I understand that the LE pin copiesthe content from the shift register to the actual data register, which makes the command effective). Answer The ADF4158 does not have a dedicated hardware trigger pin but your assumption on how LE works is correct. You cannot just pulse the pin – the partrequires 32 bits before the low to high LE transition. On the next reference edge the sweep will start assuming R0[31]=1.The ADF4159 can use the TXdata pin as a dedicated hardware trigger when R7[20]=1. A logic high on the TXdata pin enables the sweep.

EVAL-ADF4158EB1Z driving a 24GHz MMIC

Question Can we use the charge pump output 24 on EVAL-ADF4158EB1Z and drive another evalboard by Infineon containing the BGT24MTR11 which has built-in VCO? Therefore we don’t need the onboard VCO on EVAL-ADF4158EB1Z. How can we interface the two boards? No documentation is available about the Infineon board, just attached the datasheet of their MMIC. Answer We are developing 24 GHz MMICs for radar systems and will release them later in 2013. Till then : If you want to take the charge pump output directly: • Remove R2, C2, and C1. Connect a wire to the common node between R2, C2, and C1 – i.e. any of the pads near the R2, C2, C1 labels. • Remove the VCO in case of noise/interference. • Remove R7. • Replace C19, R8, and R9 with 0 Ω links. • Connect the feedback RF signal to the RFOUT SMA. If you want to use the loop filter and take the VCO tuning voltage: • Remove the VCO and connect a wire from T7 testpoint to pin 4/5 (?) on the BGT24MTR11. • Remove R7. • Replace C19, R8, and R9 with 0 Ω links. • Connect the feedback RF signal to the RFOUT SMA.

ADF4158 and ADF4159 software source code

ADF4158 and ADF4159 software source code by ADIApproved The source codes for the ADF4158 and ADF4159 evaluation board control software is attached below. Warning: You use this at your own risk and it is not officially supported by Analog Devices. The code is written in C# and the project opens in Microsoft Visual Studio. You can get a free version of Microsoft Visual C# 2010 Express here: http://www.microsoft.com/visualstudio/eng/downloads#d-2010-express Archived questions appear below ADF4158-9_v4_10_5_SourceCode.zip RE: ADF4158 and ADF4159 software source code by kab : Thanks! That's perfect for us! RE: ADF4158 and ADF4159 software source code by TF123 : Thanks for sharing this! It's really useful to have a working starting point for developping our own application. One question regarding the CyUSB interface: I have an application where I want to be able to distinguish several ADF4159 eval boards. Unfortunately the Serialnumber property of the CyUSB device always returns zero. I assume this is because there is no serial number assigned in production. Is there a way for us to assign a serial number to each of our boards? RE: ADF4158 and ADF4159 software source code by ADIApproved : Yes - no serial number is programmed in production. It may be possible for you to write the serial number but I haven't looked into it. Consult the CyUSB documentation for more help. RE: ADF4158 and ADF4159 software source code by TF123 : Thanks. From what I can see this would involve creating a firmware version that inludes a serial number and downloading this into the EEPROM instead of RAM. Any chance you could share the source code for adf4xxx_usb_fw_2_0? RE: ADF4158 and ADF4159 software source code by ADIApproved : Yes. Get it here: https://ez.analog.com/message/52311 RE: ADF4158 and ADF4159 software source code by JLiu : 7 years ago.... If only I had found out this earlier. I wasted much time on writing the code a month ago.

Video: Using ADIsimPLL to simulate frequency ramps on the ADF4158

Video here: http://www.analog.com/en/education/education-library/videos/1846356091001.html

ADF4158 and ADF4159 - Glitches when changing frequency

Sometimes, when changing frequency, a glitch can be seen on the output of a VCO being driving by the ADF4158 or ADF4159; that is, for a very short amount of time, the VCO outputs the wrong frequency before returning to the desired frequency. This can be solved in by changing some register bits. There are four possible solutions: Set N SEL (R3, DB15) to 1. N SEL – if the INT and FRAC values are reprogrammed, internally the INT value changes 4 PFD cycles before the FRAC value, temporarily outputting the wrong frequency. Enabling N SEL (setting bit to 1) ensures INT and FRAC change at the same time. See page 19 of Rev. E datasheet for more information. Set S-D Reset (R3, DB14) to 1. S-D Reset – after a write to R0, the S-D modulator is reset. This is to create a repeatable spur pattern. However, again, this can cause the part to temporarily output the wrong frequency. Enabling S-D Reset (setting bit to 1), removes this reset. See page 19 of datasheet. Set LE SEL (R4, DB31) to 1. LE SEL – there can be an internal timing glitch in the ADF4159 if the rising-edge of LE on a register write occurs at the same time as a rising-edge of the reference signal. Enabling LE SEL (setting bit to 1), synchronizes the rising-edge of LE with the falling-edge of the reference signal. See page 21 of the datasheet. Set CLK DIV MODE (R4, DB[20:19]) to 00. CLK DIV MODE – if the Ramp features are not being used, these bits should be set to 00.