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PLL Normalized phase noise floor and 1/f phase noise

Q.

What is the difference between the PLL normalized phase noise floor and a normalized 1/f noise number?

----------------------------------------------------------------------------------------------------------------------

A.

You may have noticed in the past few months we have broken out our PLL phase noise specifications into two separate specs - a normalized phase noise floor (PNSYNTH) and a Normalized 1/f Noise number (PN1_f). This was done to more accurately represent the PLL noise profile and allow a more equal comparison with competitors who are specifying PLL phase noise in a similar manner.

The normalized phase noise floor (sometimes called the PLL Figure of Merit or FOM) is calculated as before:

PNSYNTH = PNmeas - 10log(PFD) - 20log(N)

The difference is that we now widen out the loop bandwidth to 500kHz or greater and measure the phase noise (PNmeas) at an offset of 100kHz

or more to accurately capture the PLL noise floor. This has meant that our PNSYNTH numbers that we specify have improved in many cases.

This is reflected in the PLL selection tables and is in the process of being updated in all the older data sheets.

the new 1/f spec is calculated as

PN1_f = PNmeas - 10log(10kHz / foffset) - 20log(fRF / 1GHz)

where you input the measured phase noise (PNmeas) at an offset foffset. This formula just assumes a 10dB/decade 1/f noise slope and is normalized

to 1GHz as the 1/f noise scales with frequency.

 

For low PLL loop bandwidths (< 20kHz) the in-band phase noise will be entirely dominated by the 1/f noise. For newer PLL devices we are actively improving our 1/f performance through design - an example of this is the improvement in 1/f noise seen going from the ADF4350 to the ADF4351

(PN1_f goes from -111dBc/Hz to -116dBc/Hz). For wide loop bandwidths > 50kHz, the normalized noise floor becomes important.

ADIsimPLL V3.3 and higher now models both the noise floor and 1/f noise so you can accurately simulate PLL phase noise vs. PLL loop bandwidth.

I've pasted a plot comparing measured vs. simulated results for an older and newer version of ADIsimPLL. The reference noise was omitted in ADIsimPLL to more clearly see the effect of the 1/f noise.

 

I've also attached a simple Windows app which performs the above calculations for you - hope this is useful.

 

..Austin

 

Attachments:
Tags: Phase-Locked Loop (PLL) Synthesizers adf4351 adf4350 rf and microwave
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  • Explain how the ADF41XX datasheet PLL noise is specified?
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