Category: Hardware
Product Number: AD9082
Hello,
I'm currently facing a problem deploying the reference design for ZCU102+AD9082 on a custom board with specific parameters. First I tried to port a design with the default parameters, as is:
make JESD_MODE=8B10B \ RX_LANE_RATE=15 \ TX_LANE_RATE=15 \ RX_JESD_M=4 \ RX_JESD_L=8 \ RX_JESD_S=1 \ RX_JESD_NP=16 \ RX_NUM_LINKS=1 \ TX_JESD_M=4 \ TX_JESD_L=8 \ TX_JESD_S=1 \ TX_JESD_NP=16 \ TX_NUM_LINKS=1
And it worked as can be seen here (also tested with a spectrum analyzer):
The device tree I used was:
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/frequency/hmc7044.h>
#include <dt-bindings/iio/adc/adi,ad9081.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/jesd204/adxcvr.h>
/include/ "system-conf.dtsi"
/ {
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_ssd_vqmmc: regulator_ssd_vqmmc {
compatible = "regulator-gpio";
regulator-name = "ssd_vqmmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
gpios = <&gpio 43 0>;
gpios-states = <0>;
states = <3300000 0
1800000 1>;
};
vbus_reg: regulator-vbus {
compatible = "regulator-fixed";
regulator-name = "vbus_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
off-on-delay-us = <20000>;
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
rpu0vdev0vring0: rpu0vdev0vring0@70040000 {
no-map;
reg = <0x0 0x70040000 0x0 0x4000>;
};
rpu0vdev0vring1: rpu0vdev0vring1@70044000 {
no-map;
reg = <0x0 0x70044000 0x0 0x4000>;
};
rpu0vdev0buffer: rpu0vdev0buffer@70048000 {
no-map;
reg = <0x0 0x70048000 0x0 0x100000>;
};
rproc_0_reserved: rproc@70000000 {
no-map;
reg = <0x0 0x70000000 0x0 0x40000>;
};
};
tcm_0a@ffe00000 {
no-map;
reg = <0x0 0xffe00000 0x0 0x10000>;
phandle = <0x40>;
status = "okay";
compatible = "mmio-sram";
power-domain = <&zynqmp_firmware 15>;
};
tcm_0b@ffe20000 {
no-map;
reg = <0x0 0xffe20000 0x0 0x10000>;
phandle = <0x41>;
status = "okay";
compatible = "mmio-sram";
power-domain = <&zynqmp_firmware 16>;
};
rf5ss@ff9a0000 {
compatible = "xlnx,zynqmp-r5-remoteproc";
xlnx,cluster-mode = <1>;
ranges;
reg = <0x0 0xFF9A0000 0x0 0x10000>;
#address-cells = <0x2>;
#size-cells = <0x2>;
r5f_0 {
compatible = "xilinx,r5f";
#address-cells = <2>;
#size-cells = <2>;
ranges;
sram = <0x40 0x41>;
memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
power-domain = <&zynqmp_firmware 7>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
};
};
zynqmp_ipi1 {
compatible = "xlnx,zynqmp-ipi-mailbox";
interrupt-parent = <&gic>;
interrupts = <0 29 4>;
xlnx,ipi-id = <7>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
/* APU<->RPU0 IPI mailbox controller */
ipi_mailbox_rpu0: mailbox@ff990600 {
reg = <0xff990600 0x20>,
<0xff990620 0x20>,
<0xff9900c0 0x20>,
<0xff9900e0 0x20>;
reg-names = "local_request_region",
"local_response_region",
"remote_request_region",
"remote_response_region";
#mbox-cells = <1>;
xlnx,ipi-id = <1>;
};
};
refclk_dp: refclk_dp {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
fmc {
/*
* By default, FMC Connector power is disabled.
* 1.8V compatibility is checked while booting by reading
* FMC Module's EEPROM to enable correponding FMC connector power.
*/
fmc-vadj-millivolt = <1800>;
fmc-prsnt-m2c = <&gpio3 0 GPIO_ACTIVE_HIGH>;
fmc-vcc-adj = <&gpio3 5 GPIO_ACTIVE_HIGH>;
fmc-vcc-12v = <&gpio3 3 GPIO_ACTIVE_HIGH>;
fmc-vcc-3v3 = <&gpio3 4 GPIO_ACTIVE_HIGH>;
fmc-pg-c2m = <&gpio3 12 GPIO_ACTIVE_HIGH>;
};
fmc_plus {
/*
* By default, FMC+ Connector power is disabled.
* 1.8V compatibility is checked while booting by reading
* FMC+ Module's EEPROM to enable correponding FMC+ connector power.
*/
vadj-millivolt = <1800>;
prsnt-m2c = <&gpio3 1 GPIO_ACTIVE_HIGH>;
vcc-adj = <&gpio3 6 GPIO_ACTIVE_HIGH>;
vcc-12v = <&gpio3 8 GPIO_ACTIVE_HIGH>;
vcc-3v3 = <&gpio3 9 GPIO_ACTIVE_HIGH>;
pg-c2m = <&gpio3 13 GPIO_ACTIVE_HIGH>;
};
retimer_clk: retimer_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
cpu_opp_table {
opp00 {
opp-hz = /bits/ 64 <329166666>;
};
opp01 {
opp-hz = /bits/ 64 <438888888>;
};
opp02 {
opp-hz = /bits/ 64 <658333333>;
};
opp03 {
opp-hz = /bits/ 64 <1316666666>;
};
};
};
/*
&spi0 {
status = "okay";
num-cs = <1>;
spinode: spidev@0x0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <100000000>;
};
};
*/
&watchdog0 {
status = "okay";
reset-on-timeout;
timeout-sec = <70>;
};
&uart0 {
status="okay";
};
&uart1 {
status="okay";
};
/*
Ð_100G_ernic_0 {
eth-handle = <Ð_100G_cmac_usplus_0>;
};
Ð_100G_axi_dma_0 {
xlnx,include-dre ;
};
Ð_100G_cmac_usplus_0 {
axistream-connected = <Ð_100G_axi_dma_0>;
local-mac-address = [05 0a 04 0b 03 0c];
axigpio-handle = <Ð_100G_axi_gpio_0>;
};
Ð_100G_axi_gpio_0 {
compatible = "xlnx,axi-gpio-2.0";
};
*/
&can0 {
status = "okay";
pwdn-gpio = <&gpio 80 0>;
};
&gem0 {
phy-mode = "rgmii-id";
local-mac-address = [00 01 02 03 04 05];
status = "okay";
xlnx,ptp-enet-clock = <0x0>;
phy-handle = <&phy0>;
phy-reset-gpio = <&gpio 42 1>;
phy-reset-active-low;
phy-reset-duration = <20>;
phy0: phy@1 {
reg = <1>;
compatible = "ethernet-phy-id004d.d074";
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,rxctrl-strap-worka;
at803x,led-act-blind-workaround;
at803x,eee-disabled;
at803x,vddio-1p8v;
interrupt-parent = <&gpio>;
interrupts = <12 8>;
};
};
&gem3 {
phy-mode = "rgmii-id";
local-mac-address = [1A 2B 3C 4D 5E 6F];
phy-handle = <&phy1>;
status = "okay";
xlnx,ptp-enet-clock = <0x0>;
phy-reset-gpio = <&gpio 81 1>;
phy-reset-active-low;
phy-reset-duration = <20>;
phy1: phy@1 {
reg = <1>;
compatible = "ethernet-phy-id004d.d074";
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,rxctrl-strap-worka;
at803x,led-act-blind-workaround;
at803x,eee-disabled;
at803x,vddio-1p8v;
interrupt-parent = <&gpio>;
interrupts = <82 8>;
};
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
pmic0: da9062@58 {
compatible = "dlg,da9062";
reg = <0x58>;
rtc {
compatible = "dlg,da9062-rtc";
};
gpio{
compatible = "dlg,da9062-gpio";
};
};
fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
fcs,int_n = <&gpio 78 8>;
fcs,cc = <&gpio 79 0>;
fcs,power_en = <&gpio 25 0>;
vbus-supply = <&vbus_reg>;
status = "okay";
};
si5341: clock-generator@76 {
reg = <0x76>;
compatible = "silabs,si5341";
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&ref48>;
clock-names = "xtal";
clk0 {
reg = <0>;
always-on;
};
clk1 {
reg = <1>;
always-on;
};
clk2 {
reg = <2>;
always-on;
};
clk3 {
reg = <3>;
always-on;
};
clk4 {
reg = <4>;
always-on;
};
clk5 {
reg = <5>;
always-on;
};
clk6 {
reg = <6>;
always-on;
};
clk7 {
reg = <7>;
always-on;
};
clk9 {
reg = <9>;
always-on;
};
};
dp159: hdmi-retimer@5b {
status = "okay";
compatible = "ti,dp159";
reg = <0x5b>;
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <0>;
};
i2c_mux: msd9546@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
gpio3: gpio@23 {
compatible = "ti,tca9535";
reg = <0x23>;
#gpio-cells = <2>;
gpio-controller;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
gpio1: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
#gpio-cells = <2>;
gpio-controller;
};
gpio2: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
#gpio-cells = <2>;
gpio-controller;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
address-width = <16>;
size = <32768>;
};
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
pagesize = <32>;
address-width = <16>;
size = <32768>;
};
};
};
};
&pcie {
misc = <&gpio 83 8>;
};
&sata {
status = "okay";
compatible = "ceva,ahci-1v84";
reg = <0x0 0xfd0c0000 0x0 0x2000>;
ceva,p0-cominit-params = <0x18401828>;
ceva,p0-comwake-params = <0x614080e>;
ceva,p0-burst-params = <0x13084a06>;
ceva,p0-retry-params = <0x96a43ffc>;
ceva,p1-cominit-params = <0x18401828>;
ceva,p1-comwake-params = <0x614080e>;
ceva,p1-burst-params = <0x13084a06>;
ceva,p1-retry-params = <0x96a43ffc>;
ceva,broken-gen3;
};
&usb0 {
status = "okay";
xlnx,usb-reset = <0x2faf080>;
};
&dwc3_0 {
status = "okay";
dr_mode = "otg";
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
maximum-speed = "super-speed";
};
&sdhci0{
bus-width = <8>;
};
&sdhci1 {
clock-frequency = <200000000>;
status = "okay";
bus-width = <4>;
xlnx,has-cd = <0x1>;
vqmmc-supply = <®_ssd_vqmmc>;
};
&rtc {
status = "disabled";
};
&fclk0 {
status = "okay";
};
&fclk1 {
status = "okay";
};
&fclk2 {
status = "okay";
};
&fclk3 {
status = "okay";
};
&psgtr {
status = "okay";
clocks = <&refclk_dp>;
clock-names = "ref1";
};
/*
/delete-node/ &{/amba_pl@0/axi_sysid@85000000};
/delete-node/ &{/amba_pl@0/gpio@80000000};
/delete-node/ &{/amba_pl@0/gpio@80010000};
*/
///delete-node/ &{/ref48M};
///delete-node/ &{/axi/i2c@ff030000/i2c-mux@74/i2c@1/clock-generator@36};
&amba_pl {
ref48: ref48M {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
///delete-node/ gpio@80000000;
///delete-node/ gpio@80010000;
/delete-node/ axi_dmac@9c420000;
/delete-node/ axi_jesd204_rx@84a90000;
/delete-node/ axi_adxcvr@84a60000;
/delete-node/ axi_dmac@9c430000;
/delete-node/ axi_jesd204_tx@84b90000;
/delete-node/ axi_adxcvr@84b60000;
/delete-node/ axi_sysid@85000000;
/delete-node/ data_offload@9c450000;
/delete-node/ data_offload@9c440000;
/delete-node/ ad_ip_jesd204_tpl_adc@84a10000;
/delete-node/ ad_ip_jesd204_tpl_dac@84b10000;
/*
bom_rev {
pl-aw17 = <&GPIO_board_config_gpio 0 0 0>;
pl-bb16 = <&GPIO_board_config_gpio 1 0 0>;
pl-ba16 = <&GPIO_board_config_gpio 2 0 0>;
pl-ba17 = <&GPIO_board_config_gpio 3 0 0>;
pl-ay17 = <&GPIO_board_config_gpio 4 0 0>;
};
*/
xlnk {
compatible = "xlnx,xlnk-1.0";
};
/*
vid_stream_clk: vid_stream_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <300000000>;
};
vid_s_axi_clk: vid_s_axi_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <99990000>;
};
dru_clk: dru_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
temperature-stability = <50>;
clock-frequency = <148500000>;
};
*/
};
/*
&HDMI_vid_phy_controller_0 {
clock-names = "vid_phy_axi4lite_aclk", "dru-clk";
clocks = <&vid_s_axi_clk>, <&dru_clk>;
};
&HDMI_HDMI_IN_v_frmbuf_wr_0 {
xlnx,dma-align = <32>;
};
&HDMI_HDMI_IN_v_hdmi_rx_ss_0 {
clock-names = "s_axi_cpu_aclk", "s_axis_video_aclk";
clocks = <&vid_s_axi_clk>, <&vid_stream_clk>;
};
&HDMI_HDMI_OUT_v_hdmi_tx_ss_0 {
clock-names = "s_axi_cpu_aclk", "s_axis_video_aclk", "txref-clk", "retimer-clk";
clocks = <&vid_s_axi_clk>, <&vid_stream_clk>, <&si5341 0 8>, <&dp159>;
};
&HDMI_HDMI_IN_v_proc_ss_0 {
compatible = "xlnx,v-vpss-scaler-2.2";
};
&HDMI_HDMI_OUT_v_mix_0 {
retimer-gpio = <&gpio2 9 0>;
};
&SDI_SDI_IN_v_frmbuf_wr_0 {
xlnx,dma-align = <32>;
};
*/
/*
&axi_ad9081_adxcvr_rx {
//Switch to QPLL
adi,sys-clk-select = <XCVR_QPLL>;
adi,out-clk-select = <XCVR_REFCLK_DIV2>;
};
*/
/*
&axi_ad9081_core_tx {
adi,axi-pl-fifo-enable;
};
*/
&spi1 {
status = "okay";
hmc7044: hmc7044@0 {
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <1>;
compatible = "adi,hmc7044";
reg = <0>;
spi-max-frequency = <1000000>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-sysref-provider;
adi,jesd204-max-sysref-frequency-hz = <2000000>; /* 2 MHz */
/*
* There are different versions of the AD9081-FMCA-EBZ & AD9082-FMCA-EBZ
* VCXO = 122.880 MHz, XO = 122.880MHz (AD9081-FMC-EBZ & AD9082-FMC-EBZ)
* VCXO = 100.000 MHz, XO = 100.000MHz (AD9081-FMC-EBZ-A2 & AD9082-FMC-EBZ-A2)
* To determine which board is which, read the freqency printed on the VCXO
* or use the fru-dump utility:
* #fru-dump -b /sys/bus/i2c/devices/15-0050/eeprom
*/
//adi,pll1-clkin-frequencies = <122880000 30720000 0 0>;
//adi,vcxo-frequency = <122880000>;
adi,pll1-clkin-frequencies = <100000000 10000000 0 0>;
adi,pll1-ref-prio-ctrl = <0xE1>; /* prefer CLKIN1 -> CLKIN0 -> CLKIN2 -> CLKIN3 */
adi,pll1-ref-autorevert-enable;
adi,vcxo-frequency = <100000000>;
adi,pll1-loop-bandwidth-hz = <200>;
adi,pll1-charge-pump-current-ua = <720>;
adi,pfd1-maximum-limit-frequency-hz = <1000000>; /* 1 MHz */
adi,pll2-output-frequency = <3000000000>;
adi,sysref-timer-divider = <1024>;
adi,pulse-generator-mode = <0>;
adi,clkin0-buffer-mode = <0x07>;
adi,clkin1-buffer-mode = <0x07>;
adi,oscin-buffer-mode = <0x15>;
adi,gpi-controls = <0x00 0x00 0x00 0x00>;
adi,gpo-controls = <0x37 0x33 0x00 0x00>;
clock-output-names =
"hmc7044_out0", "hmc7044_out1", "hmc7044_out2",
"hmc7044_out3", "hmc7044_out4", "hmc7044_out5",
"hmc7044_out6", "hmc7044_out7", "hmc7044_out8",
"hmc7044_out9", "hmc7044_out10", "hmc7044_out11",
"hmc7044_out12", "hmc7044_out13";
hmc7044_c0: channel@0 {
reg = <0>;
adi,extended-name = "CORE_CLK_RX";
adi,divider = <12>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c2: channel@2 {
reg = <2>;
adi,extended-name = "DEV_REFCLK";
adi,divider = <12>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c3: channel@3 {
reg = <3>;
adi,extended-name = "DEV_SYSREF";
adi,divider = <1536>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
adi,jesd204-sysref-chan;
};
hmc7044_c6: channel@6 {
reg = <6>;
adi,extended-name = "CORE_CLK_TX";
adi,divider = <12>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c8: channel@8 {
reg = <8>;
adi,extended-name = "FPGA_REFCLK1";
adi,divider = <6>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c10: channel@10 {
reg = <10>;
adi,extended-name = "CORE_CLK_RX_ALT";
adi,divider = <12>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c12: channel@12 {
reg = <12>;
adi,extended-name = "FPGA_REFCLK2";
adi,divider = <4>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c13: channel@13 {
reg = <13>;
adi,extended-name = "FPGA_SYSREF";
adi,divider = <1536>;
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
adi,jesd204-sysref-chan;
};
};
};
&spi0 {
trx0_ad9081: ad9081@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,ad9082";
reg = <0>;
spi-max-frequency = <5000000>;
/* Clocks */
clocks = <&hmc7044 2>;
clock-names = "dev_clk";
clock-output-names = "rx_sampl_clk", "tx_sampl_clk";
#clock-cells = <1>;
reset-gpios = <&gpio 133 0>;
sysref-req-gpios = <&gpio 121 0>;
rx2-enable-gpios = <&gpio 135 0>;
rx1-enable-gpios = <&gpio 134 0>;
tx2-enable-gpios = <&gpio 137 0>;
tx1-enable-gpios = <&gpio 136 0>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-top-device = <0>; /* This is the TOP device */
jesd204-link-ids = <FRAMER_LINK0_RX DEFRAMER_LINK0_TX>;
jesd204-inputs =
<&axi_ad9081_core_rx 0 FRAMER_LINK0_RX>,
<&axi_ad9081_core_tx 0 DEFRAMER_LINK0_TX>;
adi,tx-dacs {
#size-cells = <0>;
#address-cells = <1>;
adi,dac-frequency-hz = /bits/ 64 <12000000000>;
adi,main-data-paths {
#address-cells = <1>;
#size-cells = <0>;
adi,interpolation = <8>;
ad9081_dac0: dac@0 {
reg = <0>;
adi,crossbar-select = <&ad9081_tx_fddc_chan0>;
adi,nco-frequency-shift-hz = /bits/ 64 <1000000000>; /* 1000 MHz */
};
ad9081_dac1: dac@1 {
reg = <1>;
adi,crossbar-select = <&ad9081_tx_fddc_chan1>;
adi,nco-frequency-shift-hz = /bits/ 64 <1100000000>; /* 1100 MHz */
};
};
adi,channelizer-paths {
#address-cells = <1>;
#size-cells = <0>;
adi,interpolation = <1>;
ad9081_tx_fddc_chan0: channel@0 {
reg = <0>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
ad9081_tx_fddc_chan1: channel@1 {
reg = <1>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
};
adi,jesd-links {
#size-cells = <0>;
#address-cells = <1>;
ad9081_tx_jesd_l0: link@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
adi,logical-lane-mapping = /bits/ 8 <0 2 7 6 1 5 4 3>;
adi,link-mode = <17>; /* JESD Quick Configuration Mode */
adi,subclass = <1>; /* JESD SUBCLASS 0,1,2 */
adi,version = <1>; /* JESD VERSION 0=204A,1=204B,2=204C */
adi,dual-link = <0>; /* JESD Dual Link Mode */
adi,converters-per-device = <4>; /* JESD M */
adi,octets-per-frame = <1>; /* JESD F */
adi,frames-per-multiframe = <32>; /* JESD K */
adi,converter-resolution = <16>; /* JESD N */
adi,bits-per-sample = <16>; /* JESD NP' */
adi,control-bits-per-sample = <0>; /* JESD CS */
adi,lanes-per-device = <8>; /* JESD L */
adi,samples-per-converter-per-frame = <1>; /* JESD S */
adi,high-density = <1>; /* JESD HD */
adi,tpl-phase-adjust = <6>;
};
};
};
adi,rx-adcs {
#size-cells = <0>;
#address-cells = <1>;
adi,adc-frequency-hz = /bits/ 64 <6000000000>;
adi,main-data-paths {
#address-cells = <1>;
#size-cells = <0>;
ad9081_adc0: adc@0 {
reg = <0>;
adi,decimation = <4>;
adi,nco-frequency-shift-hz = /bits/ 64 <1000000000>;
adi,nco-mixer-mode = <AD9081_ADC_NCO_VIF>;
//adi,crossbar-select = <&ad9081_rx_fddc_chan0>, <&ad9081_rx_fddc_chan2>; /* Static for now */
};
ad9081_adc1: adc@1 {
reg = <1>;
adi,decimation = <4>;
adi,nco-frequency-shift-hz = /bits/ 64 <(1000000000)>;
adi,nco-mixer-mode = <AD9081_ADC_NCO_VIF>;
//adi,crossbar-select = <&ad9081_rx_fddc_chan1>, <&ad9081_rx_fddc_chan3>; /* Static for now */
};
};
adi,channelizer-paths {
#address-cells = <1>;
#size-cells = <0>;
ad9081_rx_fddc_chan0: channel@0 {
reg = <0>;
adi,decimation = <1>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
ad9081_rx_fddc_chan1: channel@1 {
reg = <1>;
adi,decimation = <1>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
};
adi,jesd-links {
#size-cells = <0>;
#address-cells = <1>;
ad9081_rx_jesd_l0: link@0 {
reg = <0>;
adi,converter-select =
<&ad9081_rx_fddc_chan0 FDDC_I>, <&ad9081_rx_fddc_chan0 FDDC_Q>,
<&ad9081_rx_fddc_chan1 FDDC_I>, <&ad9081_rx_fddc_chan1 FDDC_Q>;
adi,logical-lane-mapping = /bits/ 8 <2 0 7 6 5 4 3 1>;
adi,link-mode = <18>; /* JESD Quick Configuration Mode */
adi,subclass = <1>; /* JESD SUBCLASS 0,1,2 */
adi,version = <1>; /* JESD VERSION 0=204A,1=204B,2=204C */
adi,dual-link = <0>; /* JESD Dual Link Mode */
adi,converters-per-device = <4>; /* JESD M */
adi,octets-per-frame = <1>; /* JESD F */
adi,frames-per-multiframe = <32>; /* JESD K */
adi,converter-resolution = <16>; /* JESD N */
adi,bits-per-sample = <16>; /* JESD NP' */
adi,control-bits-per-sample = <0>; /* JESD CS */
adi,lanes-per-device = <8>; /* JESD L */
adi,samples-per-converter-per-frame = <1>; /* JESD S */
adi,high-density = <1>; /* JESD HD */
};
};
};
};
};
/ {
fpga_axi: fpga-axi@0 {
interrupt-parent = <&gic>;
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0 0 0 0xffffffff>;
rx_dma: dma@9c420000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;
};
tx_dma: dma@9c430000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c430000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;
};
axi_ad9081_core_rx: axi-ad9081-rx-hpc@84a10000 {
compatible = "adi,axi-ad9081-rx-1.0";
reg = <0x84a10000 0x8000>;
dmas = <&rx_dma 0>;
dma-names = "rx";
spibus-connected = <&trx0_ad9081>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_rx_jesd 0 FRAMER_LINK0_RX>;
};
axi_ad9081_core_tx: axi-ad9081-tx-hpc@84b10000 {
compatible = "adi,axi-ad9081-tx-1.0";
reg = <0x84b10000 0x4000>;
dmas = <&tx_dma 0>;
dma-names = "tx";
clocks = <&trx0_ad9081 1>;
clock-names = "sampl_clk";
spibus-connected = <&trx0_ad9081>;
//adi,axi-pl-fifo-enable;
adi,axi-data-offload-connected = <&axi_data_offload_tx>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_tx_jesd 0 DEFRAMER_LINK0_TX>;
};
axi_ad9081_rx_jesd: axi-jesd204-rx@84a90000 {
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84a90000 0x1000>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>, <&hmc7044 10>, <&axi_ad9081_adxcvr_rx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
#clock-cells = <0>;
clock-output-names = "jesd_rx_lane_clk";
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_adxcvr_rx 0 FRAMER_LINK0_RX>;
};
axi_ad9081_tx_jesd: axi-jesd204-tx@84b90000 {
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84b90000 0x1000>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>, <&hmc7044 6>, <&axi_ad9081_adxcvr_tx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
#clock-cells = <0>;
clock-output-names = "jesd_tx_lane_clk";
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_adxcvr_tx 0 DEFRAMER_LINK0_TX>;
};
axi_ad9081_adxcvr_rx: axi-adxcvr-rx@84a60000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,axi-adxcvr-1.0";
reg = <0x84a60000 0x1000>;
clocks = <&hmc7044 12>;
clock-names = "conv";
#clock-cells = <1>;
clock-output-names = "rx_gt_clk", "rx_out_clk";
/* Switch to QPLL */
adi,sys-clk-select = <XCVR_QPLL>;
adi,out-clk-select = <XCVR_REFCLK_DIV2>;
di,use-lpm-enable;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&hmc7044 0 FRAMER_LINK0_RX>;
};
axi_ad9081_adxcvr_tx: axi-adxcvr-tx@84b60000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,axi-adxcvr-1.0";
reg = <0x84b60000 0x1000>;
clocks = <&hmc7044 12>;
clock-names = "conv";
#clock-cells = <1>;
clock-output-names = "tx_gt_clk", "tx_out_clk";
adi,sys-clk-select = <XCVR_QPLL>;
adi,out-clk-select = <XCVR_REFCLK_DIV2>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&hmc7044 0 DEFRAMER_LINK0_TX>;
};
axi_sysid_0: axi-sysid-0@85000000 {
compatible = "adi,axi-sysid-1.00.a";
reg = <0x85000000 0x10000>;
};
axi_data_offload_tx: axi-data-offload-0@9c440000 {
compatible = "adi,axi-data-offload-1.0.a";
reg = <0x9c440000 0x10000>;
// adi,bringup;
// adi,oneshot;
// adi,bypass;
// adi,sync-config = <2>;
// adi,transfer-length = /bits/ 64 <0x10000>; // 2**16 bytes
};
axi_data_offload_rx: axi-data-offload-1@9c450000 {
compatible = "adi,axi-data-offload-1.0.a";
reg = <0x9c450000 0x10000>;
};
};
};
Then, I tried to use a different configuration, chosen per the manual:
This time, the HDL was created with the following command:
make JESD_MODE=8B10B RX_LANE_RATE=6.4 TX_LANE_RATE=6.4 RX_JESD_M=4 RX_JESD_L=2 RX_JESD_S=1 RX_JESD_NP=16 RX_NUM_LINKS=1 TX_JESD_M=4 TX_JESD_L=2 TX_JESD_S=1 TX_JESD_NP=16 TX_NUM_LINKS=1
This time I got no link, and I'm not sure what I did wrong:
I have absolutely no idea where that 180Mhz clock is coming from and I followed the exact same procedure as in the working case. Here is the clock summary attached:
root@zynqmp-iwg35m:~# cat /sys/kernel/debug/clk/clk_summary
enable prepare protect
duty hardware
clock count count count rate accuracy
phase cycle nshot enable
--------------------------------------------------------------------------------
------------------------------
0-005b 0 0 0 0 0
0 50000 0
Y
hmc7044_out13 0 0 0 1250000 0
0 50000 0
Y
hmc7044_out12 2 2 0 320000000 0
0 50000 0
Y
tx_out_clk 0 0 0 160000000 0
0 50000 0
Y
tx_gt_clk 0 0 0 6400000 0
0 50000 0
?
rx_out_clk 0 0 0 160000000 0
0 50000 0
Y
rx_gt_clk 0 0 0 6400000 0
0 50000 0
?
hmc7044_out10 0 0 0 160000000 0
0 50000 0
Y
hmc7044_out8 0 0 0 320000000 0
0 50000 0
Y
hmc7044_out6 0 0 0 160000000 0
0 50000 0
Y
hmc7044_out3 0 0 0 1250000 0
0 50000 0
Y
hmc7044_out2 2 2 0 160000000 0
0 50000 0
Y
spi0.0-tx_sampl_clk 1 1 0 160000000 0
0 50000 0
Y
spi0.0-rx_sampl_clk 0 0 0 160000000 0
0 50000 0
Y
hmc7044_out0 0 0 0 160000000 0
0 50000 0
Y
retimer_clk 0 0 0 148500000 0
0 50000 0
Y
refclk_dp 1 1 0 27000000 0
0 50000 0
Y
ref48M 1 2 0 48000000 0
0 50000 0
Y
clock-generator 0 4 0 13750000 0
0 50000 0
Y
clock-generator.N4 0 0 0 0 0
0 50000 0
Y
clock-generator.N3 0 1 0 208000000 0
0 50000 0
Y
clock-generator.3 0 1 0 52000000 0
0 50000 0
Y
clock-generator.N2 0 2 0 594000000 0
0 50000 0
Y
clock-generator.9 0 1 0 148500000 0
0 50000 0
Y
clock-generator.8 0 0 0 148500000 0
0 50000 0
Y
clock-generator.2 0 1 0 27000000 0
0 50000 0
Y
clock-generator.N1 0 2 0 200000000 0
0 50000 0
Y
clock-generator.5 0 1 0 100000000 0
0 50000 0
Y
clock-generator.4 0 1 0 100000000 0
0 50000 0
Y
clock-generator.N0 0 4 0 1250000000 0
0 50000 0
Y
clock-generator.7 0 1 0 156250000 0
0 50000 0
Y
clock-generator.6 0 1 0 156250000 0
0 50000 0
Y
clock-generator.1 0 1 0 156250000 0
0 50000 0
Y
clock-generator.0 0 1 0 125000000 0
0 50000 0
Y
misc_clk_0 0 0 0 100000000 0
0 50000 0
Y
aux_ref_clk 0 0 0 27000000 0
0 50000 0
Y
gt_crx_ref_clk 0 0 0 108000000 0
0 50000 0
Y
pss_alt_ref_clk 0 0 0 0 0
0 50000 0
Y
video_clk 0 0 0 33333000 0
0 50000 0
Y
pss_ref_clk 3 3 3 33333333 0
0 50000 0
Y
vpll_post_src 0 0 0 33333333 0
0 50000 0
Y
vpll_pre_src 0 0 0 33333333 0
0 50000 0
Y
vpll_int 0 0 0 2999999970 0
0 50000 0
Y
vpll_half 0 0 0 1499999985 0
0 50000 0
Y
vpll_int_mux 0 0 0 1499999985 0
0 50000 0
Y
vpll 0 0 0 1499999985 0
0 50000 0
Y
dp_video_ref_mux 0 0 0 1499999985
0 0 50000 0
Y
dp_video_ref_div1 0 0 0 299999997
0 0 50000 0
Y
dp_video_ref_div2 0 0 0 299999997
0 0 50000 0
Y
dp_video_ref 0 0 0 299999997
0 0 50000 0
N
vpll_to_lpd 0 0 0 499999995 0
0 50000 0
Y
dpll_post_src 0 0 0 33333333 0
0 50000 0
Y
dpll_pre_src 1 1 1 33333333 0
0 50000 0
Y
dpll_int 1 1 1 2399999976 0
0 50000 0
Y
dpll_half 1 1 1 1199999988 0
0 50000 0
Y
dpll_int_mux 1 1 1 1199999988 0
0 50000 0
Y
dpll 1 1 1 1199999988 0
0 50000 0
Y
gpu_ref_mux 0 0 0 1199999988 0
0 50000 0
Y
gpu_ref_div1 0 0 0 599999994
0 0 50000 0
Y
gpu_ref 0 0 0 599999994
0 0 50000 0
N
gpu_pp1_ref 0 0 0 599999994
0 0 50000 0
N
gpu_pp0_ref 0 0 0 599999994
0 0 50000 0
N
dpdma_ref_mux 1 1 1 1199999988
0 0 50000 0
Y
dpdma_ref_div1 1 1 1 599999994
0 0 50000 0
Y
dpdma_ref 1 1 1 599999994
0 0 50000 0
Y
gdma_ref_mux 0 0 0 1199999988 0
0 50000 0
Y
gdma_ref_div1 0 0 0 599999994
0 0 50000 0
Y
gdma_ref 0 0 0 599999994
0 0 50000 0
N
acpu_mux 0 0 0 1199999988 0
0 50000 0
Y
acpu 0 0 0 1199999988 0
0 50000 0
Y
dpll_to_lpd 0 0 0 399999996 0
0 50000 0
Y
apll_post_src 0 0 0 33333333 0
0 50000 0
Y
apll_pre_src 0 0 0 33333333 0
0 50000 0
Y
apll_int 0 0 0 2099999979 0
0 50000 0
Y
apll_half 0 0 0 1049999989 0
0 50000 0
Y
apll_int_mux 0 0 0 1049999989 0
0 50000 0
Y
apll 0 0 0 1049999989 0
0 50000 0
Y
rpll_post_src 0 0 0 33333333 0
0 50000 0
Y
rpll_pre_src 1 1 1 33333333 0
0 50000 0
Y
rpll_int 1 1 1 2393394954 0
0 50000 0
Y
rpll_half 1 1 1 1196697477 0
0 50000 0
Y
rpll_int_mux 1 1 1 1196697477 0
0 50000 0
Y
rpll 2 2 1 1196697477 0
0 50000 0
Y
pl2_ref_mux 1 1 0 1196697477 0
0 50000 0
Y
pl2_ref_div1 1 1 0 199449580
0 0 50000 0
Y
pl2_ref_div2 1 1 0 199449580
0 0 50000 0
Y
pl2_ref 3 3 0 199449580
0 0 50000 0
Y
spi1_ref_mux 0 0 0 1196697477 0
0 50000 0
Y
spi1_ref_div1 0 0 0 199449580
0 0 50000 0
Y
spi1_ref_div2 0 0 0 199449580
0 0 50000 0
Y
spi1_ref 0 0 0 199449580
0 0 50000 0
N
rpll_to_fpd 1 1 1 22579198 0
0 50000 0
Y
dp_stc_ref_mux 0 0 0 22579198
0 0 50000 0
Y
dp_stc_ref_div1 0 0 0 1505280
0 0 50000 0
Y
dp_stc_ref_div2 0 0 0 150528
0 0 0 50000 0
Y
dp_stc_ref 0 0 0 1505280
0 0 50000 0
N
dp_audio_ref_mux 1 1 1 22579198
0 0 50000 0
Y
dp_audio_ref_div1 1 1 1 22579198
0 0 50000 0
Y
dp_audio_ref_div2 1 1 1 22579
198 0 0 50000 0
Y
dp_audio_ref 1 1 1 2257919
8 0 0 50000 0
Y
iopll_post_src 0 0 0 33333333 0
0 50000 0
Y
iopll_pre_src 1 1 1 33333333 0
0 50000 0
Y
iopll_int 1 1 1 2999999970 0
0 50000 0
Y
iopll_half 1 1 1 1499999985 0
0 50000 0
Y
iopll_int_mux 1 1 1 1499999985 0
0 50000 0
Y
iopll 14 15 10 1499999985 0
0 50000 0
Y
gem3_ref_ung_mux 0 0 0 1499999985
0 0 50000 0
Y
gem3_ref_ung_div1 0 0 0 124999999
0 0 50000 0
Y
gem3_ref_ung 0 0 0 124999999
0 0 50000 0
Y
gem3_ref 0 0 0 124999999
0 0 50000 0
Y
gem3_tx 0 0 0 124999999
0 0 50000 0
N
gem2_ref_ung_mux 0 0 0 1499999985
0 0 50000 0
Y
gem2_ref_ung_div1 0 0 0 62500000
0 0 50000 0
Y
gem2_ref_ung 0 0 0 62500000
0 0 50000 0
Y
gem2_ref 0 0 0 62500000
0 0 50000 0
Y
gem2_tx 0 0 0 62500000
0 0 50000 0
Y
gem1_ref_ung_mux 0 0 0 1499999985
0 0 50000 0
Y
gem1_ref_ung_div1 0 0 0 62500000
0 0 50000 0
Y
gem1_ref_ung 0 0 0 62500000
0 0 50000 0
Y
gem1_ref 0 0 0 62500000
0 0 50000 0
Y
gem1_tx 0 0 0 62500000
0 0 50000 0
Y
gem0_ref_ung_mux 1 1 0 1499999985
0 0 50000 0
Y
gem0_ref_ung_div1 1 1 0 1499999985
0 0 50000 0
Y
gem0_ref_ung 1 1 0 124999999
0 0 50000 0
Y
gem0_ref 2 2 0 124999999
0 0 50000 0
Y
gem0_tx 1 1 0 124999999
0 0 50000 0
Y
pl3_ref_mux 1 1 0 1499999985 0
0 50000 0
Y
pl3_ref_div1 1 1 0 124999999
0 0 50000 0
Y
pl3_ref_div2 1 1 0 124999999
0 0 50000 0
Y
pl3_ref 1 1 0 124999999
0 0 50000 0
Y
pl1_ref_mux 1 1 0 1499999985 0
0 50000 0
Y
pl1_ref_div1 1 1 0 299999997
0 0 50000 0
Y
pl1_ref_div2 1 1 0 299999997
0 0 50000 0
Y
pl1_ref 1 1 0 299999997
0 0 50000 0
Y
pl0_ref_mux 1 1 0 1499999985 0
0 50000 0
Y
pl0_ref_div1 1 1 0 99999999
0 0 50000 0
Y
pl0_ref_div2 1 1 0 99999999
0 0 50000 0
Y
pl0_ref 3 5 0 99999999
0 0 50000 0
Y
ams_ref_mux 1 1 1 1499999985 0
0 50000 0
Y
ams_ref_div1 1 1 1 50000000
0 0 50000 0
Y
ams_ref_div2 1 1 1 50000000
0 0 50000 0
Y
ams_ref 1 1 1 50000000
0 0 50000 0
Y
adma_ref_mux 0 0 0 1499999985 0
0 50000 0
Y
adma_ref_div1 0 0 0 499999995
0 0 50000 0
Y
adma_ref 0 0 0 499999995
0 0 50000 0
N
can1_ref_mux 0 0 0 1499999985 0
0 50000 0
Y
can1_ref_div1 0 0 0 99999999
0 0 50000 0
Y
can1_ref_div2 0 0 0 99999999
0 0 50000 0
Y
can1_ref 0 0 0 99999999
0 0 50000 0
N
can1 0 0 0 99999999
0 0 50000 0
Y
can0_ref_mux 0 0 0 1499999985 0
0 50000 0
Y
can0_ref_div1 0 0 0 99999999
0 0 50000 0
Y
can0_ref_div2 0 0 0 99999999
0 0 50000 0
Y
can0_ref 0 0 0 99999999
0 0 50000 0
N
can0 0 0 0 99999999
0 0 50000 0
Y
i2c1_ref_mux 0 0 0 1499999985 0
0 50000 0
Y
i2c1_ref_div1 0 0 0 299999997
0 0 50000 0
Y
i2c1_ref_div2 0 0 0 299999997
0 0 50000 0
Y
i2c1_ref 0 0 0 299999997
0 0 50000 0
Y
i2c0_ref_mux 1 1 1 1499999985 0
0 50000 0
Y
i2c0_ref_div1 1 1 1 99999999
0 0 50000 0
Y
i2c0_ref_div2 1 1 1 99999999
0 0 50000 0
Y
i2c0_ref 1 1 1 99999999
0 0 50000 0
Y
nand_ref_mux 0 0 0 1499999985 0
0 50000 0
Y
nand_ref_div1 0 0 0 46875000
0 0 50000 0
Y
nand_ref_div2 0 0 0 9375000
0 0 50000 0
Y
nand_ref 0 0 0 9375000
0 0 50000 0
N
spi0_ref_mux 0 0 0 1499999985 0
0 50000 0
Y
spi0_ref_div1 0 0 0 166666665
0 0 50000 0
Y
spi0_ref_div2 0 0 0 166666665
0 0 50000 0
Y
spi0_ref 0 0 0 166666665
0 0 50000 0
N
uart1_ref_mux 0 1 1 1499999985
0 0 50000 0
Y
uart1_ref_div1 0 1 1 99999999
0 0 50000 0
Y
uart1_ref_div2 0 1 1 99999999
0 0 50000 0
Y
uart1_ref 0 1 1 99999999
0 0 50000 0
N
uart0_ref_mux 1 1 1 1499999985
0 0 50000 0
Y
uart0_ref_div1 1 1 1 99999999
0 0 50000 0
Y
uart0_ref_div2 1 1 1 99999999
0 0 50000 0
Y
uart0_ref 1 1 1 99999999
0 0 50000 0
Y
sdio1_ref_mux 1 1 1 1499999985
0 0 50000 0
Y
sdio1_ref_div1 1 1 1 1499999985
0 0 50000 0
Y
sdio1_ref_div2 1 1 1 214285713
0 0 50000 0
Y
sdio1_ref 1 1 1 214285713
0 0 50000 0
Y
clk_in_sd1 0 0 0 200000000
0 0 50000 0
Y
clk_out_sd1 0 0 0 200000000
0 0 50000 0
Y
sdio0_ref_mux 1 1 1 1499999985
0 0 50000 0
Y
sdio0_ref_div1 1 1 1 1499999985
0 0 50000 0
Y
sdio0_ref_div2 1 1 1 187499999
0 0 50000 0
Y
sdio0_ref 1 1 1 187499999
0 0 50000 0
Y
clk_in_sd0 0 0 0 200000000
0 0 50000 0
Y
clk_out_sd0 0 0 0 200000000
0 0 50000 0
Y
qspi_ref_mux 0 0 0 1499999985 0
0 50000 0
Y
qspi_ref_div1 0 0 0 187499999
0 0 50000 0
Y
qspi_ref_div2 0 0 0 187499999
0 0 50000 0
Y
qspi_ref 0 0 0 187499999
0 0 50000 0
Y
gem_tsu_ref_mux 1 1 1 1499999985
0 0 50000 0
Y
gem_tsu_ref_div1 1 1 1 249999998
0 0 50000 0
Y
gem_tsu_ref_div2 1 1 1 249999998
0 0 50000 0
Y
gem_tsu_ref 1 1 1 249999998
0 0 50000 0
Y
gem_tsu 1 1 0 249999998
0 0 50000 0
Y
usb3_dual_ref_mux 1 1 1 1499999985
0 0 50000 0
Y
usb3_dual_ref_div1 1 1 1 60000000
0 0 50000 0
Y
usb3_dual_ref_div2 1 1 1 2000000
0 0 0 50000 0
Y
usb3_dual_ref 2 2 2 20000000
0 0 50000 0
Y
usb1_bus_ref_mux 0 0 0 1499999985
0 0 50000 0
Y
usb1_bus_ref_div1 0 0 0 124999999
0 0 50000 0
Y
usb1_bus_ref_div2 0 0 0 124999999
0 0 50000 0
Y
usb1_bus_ref 0 0 0 124999999
0 0 50000 0
N
usb0_bus_ref_mux 1 1 1 1499999985
0 0 50000 0
Y
usb0_bus_ref_div1 1 1 1 249999998
0 0 50000 0
Y
usb0_bus_ref_div2 1 1 1 249999998
0 0 50000 0
Y
usb0_bus_ref 1 1 1 249999998
0 0 50000 0
Y
lpd_lsbus_mux 1 1 0 1499999985
0 0 50000 0
Y
lpd_lsbus_div1 1 1 0 99999999
0 0 50000 0
Y
lpd_lsbus 8 9 0 99999999
0 0 50000 0
Y
lpd_wdt 1 1 0 99999999
0 0 50000 0
Y
iopll_to_fpd 3 3 2 499999995 0
0 50000 0
Y
topsw_lsbus_mux 1 1 0 499999995
0 0 50000 0
Y
topsw_lsbus_div1 1 1 0 99999999
0 0 50000 0
Y
topsw_lsbus 4 4 0 99999999
0 0 50000 0
Y
fpd_wdt 1 1 0 99999999
0 0 50000 0
Y
pcie_ref_mux 1 1 1 499999995
0 0 50000 0
Y
pcie_ref_div1 1 1 1 249999998
0 0 50000 0
Y
pcie_ref 1 1 1 249999998
0 0 50000 0
Y
sata_ref_mux 1 1 1 499999995
0 0 50000 0
Y
sata_ref_div1 1 1 1 249999998
0 0 50000 0
Y
sata_ref 1 1 1 249999998
0 0 50000 0
Y
can1_mio 0 0 0 0 0
0 50000 0
Y
can0_mio 0 0 0 0 0
0 50000 0
Y
gem3_rx 0 0 0 0 0
0 50000 0
N
gem2_rx 0 0 0 0 0
0 50000 0
N
gem1_rx 0 0 0 0 0
0 50000 0
N
gem0_rx 1 1 0 0 0
0 50000 0
Y
root@zynqmp-iwg35m:~#
For the new parameters, I changed the device tree to the following:
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/frequency/hmc7044.h>
#include <dt-bindings/iio/adc/adi,ad9081.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/jesd204/adxcvr.h>
/include/ "system-conf.dtsi"
/ {
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_ssd_vqmmc: regulator_ssd_vqmmc {
compatible = "regulator-gpio";
regulator-name = "ssd_vqmmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
gpios = <&gpio 43 0>;
gpios-states = <0>;
states = <3300000 0
1800000 1>;
};
vbus_reg: regulator-vbus {
compatible = "regulator-fixed";
regulator-name = "vbus_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
off-on-delay-us = <20000>;
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
rpu0vdev0vring0: rpu0vdev0vring0@70040000 {
no-map;
reg = <0x0 0x70040000 0x0 0x4000>;
};
rpu0vdev0vring1: rpu0vdev0vring1@70044000 {
no-map;
reg = <0x0 0x70044000 0x0 0x4000>;
};
rpu0vdev0buffer: rpu0vdev0buffer@70048000 {
no-map;
reg = <0x0 0x70048000 0x0 0x100000>;
};
rproc_0_reserved: rproc@70000000 {
no-map;
reg = <0x0 0x70000000 0x0 0x40000>;
};
};
tcm_0a@ffe00000 {
no-map;
reg = <0x0 0xffe00000 0x0 0x10000>;
phandle = <0x40>;
status = "okay";
compatible = "mmio-sram";
power-domain = <&zynqmp_firmware 15>;
};
tcm_0b@ffe20000 {
no-map;
reg = <0x0 0xffe20000 0x0 0x10000>;
phandle = <0x41>;
status = "okay";
compatible = "mmio-sram";
power-domain = <&zynqmp_firmware 16>;
};
rf5ss@ff9a0000 {
compatible = "xlnx,zynqmp-r5-remoteproc";
xlnx,cluster-mode = <1>;
ranges;
reg = <0x0 0xFF9A0000 0x0 0x10000>;
#address-cells = <0x2>;
#size-cells = <0x2>;
r5f_0 {
compatible = "xilinx,r5f";
#address-cells = <2>;
#size-cells = <2>;
ranges;
sram = <0x40 0x41>;
memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
power-domain = <&zynqmp_firmware 7>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
};
};
zynqmp_ipi1 {
compatible = "xlnx,zynqmp-ipi-mailbox";
interrupt-parent = <&gic>;
interrupts = <0 29 4>;
xlnx,ipi-id = <7>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
/* APU<->RPU0 IPI mailbox controller */
ipi_mailbox_rpu0: mailbox@ff990600 {
reg = <0xff990600 0x20>,
<0xff990620 0x20>,
<0xff9900c0 0x20>,
<0xff9900e0 0x20>;
reg-names = "local_request_region",
"local_response_region",
"remote_request_region",
"remote_response_region";
#mbox-cells = <1>;
xlnx,ipi-id = <1>;
};
};
refclk_dp: refclk_dp {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
fmc {
/*
* By default, FMC Connector power is disabled.
* 1.8V compatibility is checked while booting by reading
* FMC Module's EEPROM to enable correponding FMC connector power.
*/
fmc-vadj-millivolt = <1800>;
fmc-prsnt-m2c = <&gpio3 0 GPIO_ACTIVE_HIGH>;
fmc-vcc-adj = <&gpio3 5 GPIO_ACTIVE_HIGH>;
fmc-vcc-12v = <&gpio3 3 GPIO_ACTIVE_HIGH>;
fmc-vcc-3v3 = <&gpio3 4 GPIO_ACTIVE_HIGH>;
fmc-pg-c2m = <&gpio3 12 GPIO_ACTIVE_HIGH>;
};
fmc_plus {
/*
* By default, FMC+ Connector power is disabled.
* 1.8V compatibility is checked while booting by reading
* FMC+ Module's EEPROM to enable correponding FMC+ connector power.
*/
vadj-millivolt = <1800>;
prsnt-m2c = <&gpio3 1 GPIO_ACTIVE_HIGH>;
vcc-adj = <&gpio3 6 GPIO_ACTIVE_HIGH>;
vcc-12v = <&gpio3 8 GPIO_ACTIVE_HIGH>;
vcc-3v3 = <&gpio3 9 GPIO_ACTIVE_HIGH>;
pg-c2m = <&gpio3 13 GPIO_ACTIVE_HIGH>;
};
retimer_clk: retimer_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
cpu_opp_table {
opp00 {
opp-hz = /bits/ 64 <329166666>;
};
opp01 {
opp-hz = /bits/ 64 <438888888>;
};
opp02 {
opp-hz = /bits/ 64 <658333333>;
};
opp03 {
opp-hz = /bits/ 64 <1316666666>;
};
};
};
/*
&spi0 {
status = "okay";
num-cs = <1>;
spinode: spidev@0x0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <100000000>;
};
};
*/
&watchdog0 {
status = "okay";
reset-on-timeout;
timeout-sec = <70>;
};
&uart0 {
status="okay";
};
&uart1 {
status="okay";
};
/*
Ð_100G_ernic_0 {
eth-handle = <Ð_100G_cmac_usplus_0>;
};
Ð_100G_axi_dma_0 {
xlnx,include-dre ;
};
Ð_100G_cmac_usplus_0 {
axistream-connected = <Ð_100G_axi_dma_0>;
local-mac-address = [05 0a 04 0b 03 0c];
axigpio-handle = <Ð_100G_axi_gpio_0>;
};
Ð_100G_axi_gpio_0 {
compatible = "xlnx,axi-gpio-2.0";
};
*/
&can0 {
status = "okay";
pwdn-gpio = <&gpio 80 0>;
};
&gem0 {
phy-mode = "rgmii-id";
local-mac-address = [00 01 02 03 04 05];
status = "okay";
xlnx,ptp-enet-clock = <0x0>;
phy-handle = <&phy0>;
phy-reset-gpio = <&gpio 42 1>;
phy-reset-active-low;
phy-reset-duration = <20>;
phy0: phy@1 {
reg = <1>;
compatible = "ethernet-phy-id004d.d074";
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,rxctrl-strap-worka;
at803x,led-act-blind-workaround;
at803x,eee-disabled;
at803x,vddio-1p8v;
interrupt-parent = <&gpio>;
interrupts = <12 8>;
};
};
&gem3 {
phy-mode = "rgmii-id";
local-mac-address = [1A 2B 3C 4D 5E 6F];
phy-handle = <&phy1>;
status = "okay";
xlnx,ptp-enet-clock = <0x0>;
phy-reset-gpio = <&gpio 81 1>;
phy-reset-active-low;
phy-reset-duration = <20>;
phy1: phy@1 {
reg = <1>;
compatible = "ethernet-phy-id004d.d074";
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,rxctrl-strap-worka;
at803x,led-act-blind-workaround;
at803x,eee-disabled;
at803x,vddio-1p8v;
interrupt-parent = <&gpio>;
interrupts = <82 8>;
};
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
pmic0: da9062@58 {
compatible = "dlg,da9062";
reg = <0x58>;
rtc {
compatible = "dlg,da9062-rtc";
};
gpio{
compatible = "dlg,da9062-gpio";
};
};
fusb302: typec-portc@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
fcs,int_n = <&gpio 78 8>;
fcs,cc = <&gpio 79 0>;
fcs,power_en = <&gpio 25 0>;
vbus-supply = <&vbus_reg>;
status = "okay";
};
si5341: clock-generator@76 {
reg = <0x76>;
compatible = "silabs,si5341";
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&ref48>;
clock-names = "xtal";
clk0 {
reg = <0>;
always-on;
};
clk1 {
reg = <1>;
always-on;
};
clk2 {
reg = <2>;
always-on;
};
clk3 {
reg = <3>;
always-on;
};
clk4 {
reg = <4>;
always-on;
};
clk5 {
reg = <5>;
always-on;
};
clk6 {
reg = <6>;
always-on;
};
clk7 {
reg = <7>;
always-on;
};
clk9 {
reg = <9>;
always-on;
};
};
dp159: hdmi-retimer@5b {
status = "okay";
compatible = "ti,dp159";
reg = <0x5b>;
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <0>;
};
i2c_mux: msd9546@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
gpio3: gpio@23 {
compatible = "ti,tca9535";
reg = <0x23>;
#gpio-cells = <2>;
gpio-controller;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
gpio1: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
#gpio-cells = <2>;
gpio-controller;
};
gpio2: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
#gpio-cells = <2>;
gpio-controller;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
address-width = <16>;
size = <32768>;
};
eeprom@52 {
compatible = "atmel,24c32";
reg = <0x52>;
pagesize = <32>;
address-width = <16>;
size = <32768>;
};
};
};
};
&pcie {
misc = <&gpio 83 8>;
};
&sata {
status = "okay";
compatible = "ceva,ahci-1v84";
reg = <0x0 0xfd0c0000 0x0 0x2000>;
ceva,p0-cominit-params = <0x18401828>;
ceva,p0-comwake-params = <0x614080e>;
ceva,p0-burst-params = <0x13084a06>;
ceva,p0-retry-params = <0x96a43ffc>;
ceva,p1-cominit-params = <0x18401828>;
ceva,p1-comwake-params = <0x614080e>;
ceva,p1-burst-params = <0x13084a06>;
ceva,p1-retry-params = <0x96a43ffc>;
ceva,broken-gen3;
};
&usb0 {
status = "okay";
xlnx,usb-reset = <0x2faf080>;
};
&dwc3_0 {
status = "okay";
dr_mode = "otg";
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
maximum-speed = "super-speed";
};
&sdhci0{
bus-width = <8>;
};
&sdhci1 {
clock-frequency = <200000000>;
status = "okay";
bus-width = <4>;
xlnx,has-cd = <0x1>;
vqmmc-supply = <®_ssd_vqmmc>;
};
&rtc {
status = "disabled";
};
&fclk0 {
status = "okay";
};
&fclk1 {
status = "okay";
};
&fclk2 {
status = "okay";
};
&fclk3 {
status = "okay";
};
&psgtr {
status = "okay";
clocks = <&refclk_dp>;
clock-names = "ref1";
};
/*
/delete-node/ &{/amba_pl@0/axi_sysid@85000000};
/delete-node/ &{/amba_pl@0/gpio@80000000};
/delete-node/ &{/amba_pl@0/gpio@80010000};
*/
///delete-node/ &{/ref48M};
///delete-node/ &{/axi/i2c@ff030000/i2c-mux@74/i2c@1/clock-generator@36};
&amba_pl {
ref48: ref48M {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
///delete-node/ gpio@80000000;
///delete-node/ gpio@80010000;
/delete-node/ axi_dmac@9c420000;
/delete-node/ axi_jesd204_rx@84a90000;
/delete-node/ axi_adxcvr@84a60000;
/delete-node/ axi_dmac@9c430000;
/delete-node/ axi_jesd204_tx@84b90000;
/delete-node/ axi_adxcvr@84b60000;
/delete-node/ axi_sysid@85000000;
/delete-node/ data_offload@9c450000;
/delete-node/ data_offload@9c440000;
/delete-node/ ad_ip_jesd204_tpl_adc@84a10000;
/delete-node/ ad_ip_jesd204_tpl_dac@84b10000;
/*
bom_rev {
pl-aw17 = <&GPIO_board_config_gpio 0 0 0>;
pl-bb16 = <&GPIO_board_config_gpio 1 0 0>;
pl-ba16 = <&GPIO_board_config_gpio 2 0 0>;
pl-ba17 = <&GPIO_board_config_gpio 3 0 0>;
pl-ay17 = <&GPIO_board_config_gpio 4 0 0>;
};
*/
xlnk {
compatible = "xlnx,xlnk-1.0";
};
/*
vid_stream_clk: vid_stream_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <300000000>;
};
vid_s_axi_clk: vid_s_axi_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <99990000>;
};
dru_clk: dru_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
temperature-stability = <50>;
clock-frequency = <148500000>;
};
*/
};
/*
&HDMI_vid_phy_controller_0 {
clock-names = "vid_phy_axi4lite_aclk", "dru-clk";
clocks = <&vid_s_axi_clk>, <&dru_clk>;
};
&HDMI_HDMI_IN_v_frmbuf_wr_0 {
xlnx,dma-align = <32>;
};
&HDMI_HDMI_IN_v_hdmi_rx_ss_0 {
clock-names = "s_axi_cpu_aclk", "s_axis_video_aclk";
clocks = <&vid_s_axi_clk>, <&vid_stream_clk>;
};
&HDMI_HDMI_OUT_v_hdmi_tx_ss_0 {
clock-names = "s_axi_cpu_aclk", "s_axis_video_aclk", "txref-clk", "retimer-clk";
clocks = <&vid_s_axi_clk>, <&vid_stream_clk>, <&si5341 0 8>, <&dp159>;
};
&HDMI_HDMI_IN_v_proc_ss_0 {
compatible = "xlnx,v-vpss-scaler-2.2";
};
&HDMI_HDMI_OUT_v_mix_0 {
retimer-gpio = <&gpio2 9 0>;
};
&SDI_SDI_IN_v_frmbuf_wr_0 {
xlnx,dma-align = <32>;
};
*/
/*
&axi_ad9081_adxcvr_rx {
//Switch to QPLL
adi,sys-clk-select = <XCVR_QPLL>;
adi,out-clk-select = <XCVR_REFCLK_DIV2>;
};
*/
/*
&axi_ad9081_core_tx {
adi,axi-pl-fifo-enable;
};
*/
&spi1 {
status = "okay";
hmc7044: hmc7044@0 {
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <1>;
compatible = "adi,hmc7044";
reg = <0>;
spi-max-frequency = <1000000>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-sysref-provider;
adi,jesd204-max-sysref-frequency-hz = <2000000>; /* 2 MHz */
/*
* There are different versions of the AD9081-FMCA-EBZ & AD9082-FMCA-EBZ
* VCXO = 122.880 MHz, XO = 122.880MHz (AD9081-FMC-EBZ & AD9082-FMC-EBZ)
* VCXO = 100.000 MHz, XO = 100.000MHz (AD9081-FMC-EBZ-A2 & AD9082-FMC-EBZ-A2)
* To determine which board is which, read the freqency printed on the VCXO
* or use the fru-dump utility:
* #fru-dump -b /sys/bus/i2c/devices/15-0050/eeprom
*/
//adi,pll1-clkin-frequencies = <122880000 30720000 0 0>;
//adi,vcxo-frequency = <122880000>;
adi,pll1-clkin-frequencies = <100000000 10000000 0 0>;
adi,pll1-ref-prio-ctrl = <0xE1>; /* prefer CLKIN1 -> CLKIN0 -> CLKIN2 -> CLKIN3 */
adi,pll1-ref-autorevert-enable;
adi,vcxo-frequency = <100000000>;
adi,pll1-loop-bandwidth-hz = <200>;
adi,pll1-charge-pump-current-ua = <720>;
adi,pfd1-maximum-limit-frequency-hz = <1000000>; /* 1 MHz */
adi,pll2-output-frequency = <2880000000>;
adi,sysref-timer-divider = <1024>;
adi,pulse-generator-mode = <0>;
adi,clkin0-buffer-mode = <0x07>;
adi,clkin1-buffer-mode = <0x07>;
adi,oscin-buffer-mode = <0x15>;
adi,gpi-controls = <0x00 0x00 0x00 0x00>;
adi,gpo-controls = <0x37 0x33 0x00 0x00>;
clock-output-names =
"hmc7044_out0", "hmc7044_out1", "hmc7044_out2",
"hmc7044_out3", "hmc7044_out4", "hmc7044_out5",
"hmc7044_out6", "hmc7044_out7", "hmc7044_out8",
"hmc7044_out9", "hmc7044_out10", "hmc7044_out11",
"hmc7044_out12", "hmc7044_out13";
hmc7044_c0: channel@0 {
reg = <0>;
adi,extended-name = "CORE_CLK_RX";
adi,divider = <18>; //250
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c2: channel@2 {
reg = <2>;
adi,extended-name = "DEV_REFCLK";
adi,divider = <18>; //250
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c3: channel@3 {
reg = <3>;
adi,extended-name = "DEV_SYSREF";
adi,divider = <1536>; //1.953
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
adi,jesd204-sysref-chan;
};
hmc7044_c6: channel@6 {
reg = <6>;
adi,extended-name = "CORE_CLK_TX";
adi,divider = <18>;//250
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c8: channel@8 {
reg = <8>;
adi,extended-name = "FPGA_REFCLK1";
adi,divider = <9>;//500
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c10: channel@10 {
reg = <10>;
adi,extended-name = "CORE_CLK_RX_ALT";
adi,divider = <18>;//250
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c12: channel@12 {
reg = <12>;
adi,extended-name = "FPGA_REFCLK2";
adi,divider = <9>;//750
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
};
hmc7044_c13: channel@13 {
reg = <13>;
adi,extended-name = "FPGA_SYSREF";
adi,divider = <1536>;//1.536
adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>;
adi,jesd204-sysref-chan;
};
};
};
&spi0 {
trx0_ad9081: ad9081@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,ad9082";
reg = <0>;
spi-max-frequency = <5000000>;
/* Clocks */
clocks = <&hmc7044 2>;
clock-names = "dev_clk";
clock-output-names = "rx_sampl_clk", "tx_sampl_clk";
#clock-cells = <1>;
reset-gpios = <&gpio 133 0>;
sysref-req-gpios = <&gpio 121 0>;
rx2-enable-gpios = <&gpio 135 0>;
rx1-enable-gpios = <&gpio 134 0>;
tx2-enable-gpios = <&gpio 137 0>;
tx1-enable-gpios = <&gpio 136 0>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-top-device = <0>; /* This is the TOP device */
jesd204-link-ids = <FRAMER_LINK0_RX DEFRAMER_LINK0_TX>;
jesd204-inputs =
<&axi_ad9081_core_rx 0 FRAMER_LINK0_RX>,
<&axi_ad9081_core_tx 0 DEFRAMER_LINK0_TX>;
adi,tx-dacs {
#size-cells = <0>;
#address-cells = <1>;
adi,dac-frequency-hz = /bits/ 64 <5120000000>;
adi,main-data-paths {
#address-cells = <1>;
#size-cells = <0>;
adi,interpolation = <8>;
ad9081_dac0: dac@0 {
reg = <0>;
adi,crossbar-select = <&ad9081_tx_fddc_chan0>;
adi,nco-frequency-shift-hz = /bits/ 64 <1000000000>; /* 1000 MHz */
};
ad9081_dac1: dac@1 {
reg = <1>;
adi,crossbar-select = <&ad9081_tx_fddc_chan1>;
adi,nco-frequency-shift-hz = /bits/ 64 <1100000000>; /* 1100 MHz */
};
};
adi,channelizer-paths {
#address-cells = <1>;
#size-cells = <0>;
adi,interpolation = <4>;
ad9081_tx_fddc_chan0: channel@0 {
reg = <0>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
ad9081_tx_fddc_chan1: channel@1 {
reg = <1>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
};
adi,jesd-links {
#size-cells = <0>;
#address-cells = <1>;
ad9081_tx_jesd_l0: link@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
adi,logical-lane-mapping = /bits/ 8 <2 0 7 7 7 7 3 1>;
adi,link-mode = <5>; /* JESD Quick Configuration Mode */
adi,subclass = <1>; /* JESD SUBCLASS 0,1,2 */
adi,version = <1>; /* JESD VERSION 0=204A,1=204B,2=204C */
adi,dual-link = <0>; /* JESD Dual Link Mode */
adi,converters-per-device = <4>; /* JESD M */
adi,octets-per-frame = <4>; /* JESD F */
adi,frames-per-multiframe = <32>; /* JESD K */
adi,converter-resolution = <16>; /* JESD N */
adi,bits-per-sample = <16>; /* JESD NP' */
adi,control-bits-per-sample = <0>; /* JESD CS */
adi,lanes-per-device = <2>; /* JESD L */
adi,samples-per-converter-per-frame = <1>; /* JESD S */
adi,high-density = <1>; /* JESD HD */
adi,tpl-phase-adjust = <6>;
};
};
};
adi,rx-adcs {
#size-cells = <0>;
#address-cells = <1>;
adi,adc-frequency-hz = /bits/ 64 <5120000000>;
adi,main-data-paths {
#address-cells = <1>;
#size-cells = <0>;
ad9081_adc0: adc@0 {
reg = <0>;
adi,decimation = <4>;
adi,nco-frequency-shift-hz = /bits/ 64 <1000000000>;
adi,nco-mixer-mode = <AD9081_ADC_NCO_VIF>;
//adi,crossbar-select = <&ad9081_rx_fddc_chan0>, <&ad9081_rx_fddc_chan2>; /* Static for now */
};
ad9081_adc1: adc@1 {
reg = <1>;
adi,decimation = <4>;
adi,nco-frequency-shift-hz = /bits/ 64 <(1000000000)>;
adi,nco-mixer-mode = <AD9081_ADC_NCO_VIF>;
//adi,crossbar-select = <&ad9081_rx_fddc_chan1>, <&ad9081_rx_fddc_chan3>; /* Static for now */
};
};
adi,channelizer-paths {
#address-cells = <1>;
#size-cells = <0>;
ad9081_rx_fddc_chan0: channel@0 {
reg = <0>;
adi,decimation = <8>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
ad9081_rx_fddc_chan1: channel@1 {
reg = <1>;
adi,decimation = <8>;
adi,gain = <2048>; /* 2048 * 10^(gain_dB/20) */
adi,nco-frequency-shift-hz = /bits/ 64 <0>;
};
};
adi,jesd-links {
#size-cells = <0>;
#address-cells = <1>;
ad9081_rx_jesd_l0: link@0 {
reg = <0>;
adi,converter-select =
<&ad9081_rx_fddc_chan0 FDDC_I>, <&ad9081_rx_fddc_chan0 FDDC_Q>,
<&ad9081_rx_fddc_chan1 FDDC_I>, <&ad9081_rx_fddc_chan1 FDDC_Q>;
adi,logical-lane-mapping = /bits/ 8 <2 0 7 7 7 7 3 1>;
adi,link-mode = <6>; /* JESD Quick Configuration Mode */
adi,subclass = <1>; /* JESD SUBCLASS 0,1,2 */
adi,version = <1>; /* JESD VERSION 0=204A,1=204B,2=204C */
adi,dual-link = <0>; /* JESD Dual Link Mode */
adi,converters-per-device = <4>; /* JESD M */
adi,octets-per-frame = <4>; /* JESD F */
adi,frames-per-multiframe = <32>; /* JESD K */
adi,converter-resolution = <16>; /* JESD N */
adi,bits-per-sample = <16>; /* JESD NP' */
adi,control-bits-per-sample = <0>; /* JESD CS */
adi,lanes-per-device = <2>; /* JESD L */
adi,samples-per-converter-per-frame = <1>; /* JESD S */
adi,high-density = <1>; /* JESD HD */
};
};
};
};
};
/ {
fpga_axi: fpga-axi@0 {
interrupt-parent = <&gic>;
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
ranges = <0 0 0 0xffffffff>;
rx_dma: dma@9c420000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;
};
tx_dma: dma@9c430000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c430000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;
};
axi_ad9081_core_rx: axi-ad9081-rx-hpc@84a10000 {
compatible = "adi,axi-ad9081-rx-1.0";
reg = <0x84a10000 0x8000>;
dmas = <&rx_dma 0>;
dma-names = "rx";
spibus-connected = <&trx0_ad9081>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_rx_jesd 0 FRAMER_LINK0_RX>;
};
axi_ad9081_core_tx: axi-ad9081-tx-hpc@84b10000 {
compatible = "adi,axi-ad9081-tx-1.0";
reg = <0x84b10000 0x4000>;
dmas = <&tx_dma 0>;
dma-names = "tx";
clocks = <&trx0_ad9081 1>;
clock-names = "sampl_clk";
spibus-connected = <&trx0_ad9081>;
//adi,axi-pl-fifo-enable;
adi,axi-data-offload-connected = <&axi_data_offload_tx>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_tx_jesd 0 DEFRAMER_LINK0_TX>;
};
axi_ad9081_rx_jesd: axi-jesd204-rx@84a90000 {
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84a90000 0x1000>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>, <&hmc7044 10>, <&axi_ad9081_adxcvr_rx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
#clock-cells = <0>;
clock-output-names = "jesd_rx_lane_clk";
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_adxcvr_rx 0 FRAMER_LINK0_RX>;
};
axi_ad9081_tx_jesd: axi-jesd204-tx@84b90000 {
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84b90000 0x1000>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>, <&hmc7044 6>, <&axi_ad9081_adxcvr_tx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
#clock-cells = <0>;
clock-output-names = "jesd_tx_lane_clk";
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&axi_ad9081_adxcvr_tx 0 DEFRAMER_LINK0_TX>;
};
axi_ad9081_adxcvr_rx: axi-adxcvr-rx@84a60000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,axi-adxcvr-1.0";
reg = <0x84a60000 0x1000>;
clocks = <&hmc7044 12>;
clock-names = "conv";
#clock-cells = <1>;
clock-output-names = "rx_gt_clk", "rx_out_clk";
/* Switch to QPLL */
adi,sys-clk-select = <XCVR_QPLL>;
adi,out-clk-select = <XCVR_REFCLK_DIV2>;
di,use-lpm-enable;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&hmc7044 0 FRAMER_LINK0_RX>;
};
axi_ad9081_adxcvr_tx: axi-adxcvr-tx@84b60000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,axi-adxcvr-1.0";
reg = <0x84b60000 0x1000>;
clocks = <&hmc7044 12>;
clock-names = "conv";
#clock-cells = <1>;
clock-output-names = "tx_gt_clk", "tx_out_clk";
adi,sys-clk-select = <XCVR_QPLL>;
adi,out-clk-select = <XCVR_REFCLK_DIV2>;
jesd204-device;
#jesd204-cells = <2>;
jesd204-inputs = <&hmc7044 0 DEFRAMER_LINK0_TX>;
};
axi_sysid_0: axi-sysid-0@85000000 {
compatible = "adi,axi-sysid-1.00.a";
reg = <0x85000000 0x10000>;
};
axi_data_offload_tx: axi-data-offload-0@9c440000 {
compatible = "adi,axi-data-offload-1.0.a";
reg = <0x9c440000 0x10000>;
// adi,bringup;
// adi,oneshot;
// adi,bypass;
// adi,sync-config = <2>;
// adi,transfer-length = /bits/ 64 <0x10000>; // 2**16 bytes
};
axi_data_offload_rx: axi-data-offload-1@9c450000 {
compatible = "adi,axi-data-offload-1.0.a";
reg = <0x9c450000 0x10000>;
};
};
};
This is the boot log in the non-working case
root@zynqmp-iwg35m:~# dmesg
[ 0.766661] usbserial: USB Serial support registered for upd78f0730
[ 0.767907] SPI driver ads7846 has no spi_device_id for ti,tsc2046
[ 0.767911] SPI driver ads7846 has no spi_device_id for ti,ads7843
[ 0.767914] SPI driver ads7846 has no spi_device_id for ti,ads7845
[ 0.767917] SPI driver ads7846 has no spi_device_id for ti,ads7873
[ 0.768161] i2c_dev: i2c /dev entries driver
[ 0.770755] usbcore: registered new interface driver uvcvideo
[ 0.772171] EDAC DEBUG: edac_mc_add_mc_with_groups:
[ 0.772215] EDAC DEBUG: edac_create_sysfs_mci_device: device mc0 created
[ 0.772247] EDAC DEBUG: edac_create_dimm_object: device rank0 created at loca
tion csrow 0 channel 0
[ 0.772281] EDAC DEBUG: edac_create_csrow_object: device csrow0 created
[ 0.772314] EDAC MC0: Giving out device to module 1 controller synps_ddr_cont
roller: DEV synps_edac (INTERRUPT)
[ 0.772519] EDAC DEBUG: edac_device_register_sysfs_main_kobj:
[ 0.772534] EDAC DEBUG: edac_device_add_device:
[ 0.772537] EDAC DEBUG: find_edac_device_by_dev:
[ 0.772540] EDAC DEBUG: edac_device_create_sysfs: idx=0
[ 0.772551] EDAC DEBUG: edac_device_create_instances:
[ 0.772567] EDAC DEVICE0: Giving out device to module zynqmp-ocm-edac control
ler zynqmp_ocm: DEV ff960000.memory-controller (INTERRUPT)
[ 0.773073] sdhci: Secure Digital Host Controller Interface driver
[ 0.773076] sdhci: Copyright(c) Pierre Ossman
[ 0.773080] sdhci-pltfm: SDHCI platform and OF driver helper
[ 0.773866] SMCCC: SOC_ID: ID = jep106:0049:0000 Revision = 0x14758093
[ 0.773940] zynqmp_firmware_probe Platform Management API v1.1
[ 0.773992] zynqmp_firmware_probe Trustzone version v1.0
[ 0.803015] securefw securefw: securefw probed
[ 0.803338] zynqmp-aes zynqmp-aes.0: will run requests pump with realtime pri
ority
[ 0.803829] usbcore: registered new interface driver usbhid
[ 0.803833] usbhid: USB HID core driver
[ 0.804005] SPI driver fb_seps525 has no spi_device_id for syncoam,seps525
[ 0.811108] SPI driver adis16475 has no spi_device_id for adi,adis16470
[ 0.811117] SPI driver adis16475 has no spi_device_id for adi,adis16475-1
[ 0.811120] SPI driver adis16475 has no spi_device_id for adi,adis16475-2
[ 0.811123] SPI driver adis16475 has no spi_device_id for adi,adis16475-3
[ 0.811126] SPI driver adis16475 has no spi_device_id for adi,adis16477-1
[ 0.811129] SPI driver adis16475 has no spi_device_id for adi,adis16477-2
[ 0.811132] SPI driver adis16475 has no spi_device_id for adi,adis16477-3
[ 0.811135] SPI driver adis16475 has no spi_device_id for adi,adis16465-1
[ 0.811138] SPI driver adis16475 has no spi_device_id for adi,adis16465-2
[ 0.811141] SPI driver adis16475 has no spi_device_id for adi,adis16465-3
[ 0.811144] SPI driver adis16475 has no spi_device_id for adi,adis16467-1
[ 0.811147] SPI driver adis16475 has no spi_device_id for adi,adis16467-2
[ 0.811150] SPI driver adis16475 has no spi_device_id for adi,adis16467-3
[ 0.811153] SPI driver adis16475 has no spi_device_id for adi,adis16500
[ 0.811156] SPI driver adis16475 has no spi_device_id for adi,adis16501
[ 0.811159] SPI driver adis16475 has no spi_device_id for adi,adis16505-1
[ 0.811162] SPI driver adis16475 has no spi_device_id for adi,adis16505-2
[ 0.811165] SPI driver adis16475 has no spi_device_id for adi,adis16505-3
[ 0.811167] SPI driver adis16475 has no spi_device_id for adi,adis16507-1
[ 0.811170] SPI driver adis16475 has no spi_device_id for adi,adis16507-2
[ 0.811173] SPI driver adis16475 has no spi_device_id for adi,adis16507-3
[ 0.811176] SPI driver adis16475 has no spi_device_id for adi,adis16575-2
[ 0.811179] SPI driver adis16475 has no spi_device_id for adi,adis16575-3
[ 0.811182] SPI driver adis16475 has no spi_device_id for adi,adis16576-2
[ 0.811185] SPI driver adis16475 has no spi_device_id for adi,adis16576-3
[ 0.811188] SPI driver adis16475 has no spi_device_id for adi,adis16577-2
[ 0.811191] SPI driver adis16475 has no spi_device_id for adi,adis16577-3
[ 0.812639] ARM CCI_400_r1 PMU driver probed
[ 0.812883] axi_sysid 85000000.axi-sysid-0: AXI System ID core version (1.01.
a) found
[ 0.813233] axi_sysid 85000000.axi-sysid-0: system ID header version mismatch
. Expected 2, Reported 0
[ 0.813239] axi_sysid: probe of 85000000.axi-sysid-0 failed with error -14
[ 0.813818] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
[ 0.814367] usbcore: registered new interface driver snd-usb-audio
[ 0.816507] pktgen: Packet Generator for packet performance testing. Version:
2.75
[ 0.829528] Initializing XFRM netlink socket
[ 0.829602] NET: Registered PF_INET6 protocol family
[ 0.830251] Segment Routing with IPv6
[ 0.830281] In-situ OAM (IOAM) with IPv6
[ 0.830360] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[ 0.830741] NET: Registered PF_PACKET protocol family
[ 0.830751] NET: Registered PF_KEY protocol family
[ 0.830856] can: controller area network core
[ 0.830882] NET: Registered PF_CAN protocol family
[ 0.830886] can: raw protocol
[ 0.830891] can: broadcast manager protocol
[ 0.830898] can: netlink gateway - max_hops=1
[ 0.830961] RPC: Registered rdma transport module.
[ 0.830964] RPC: Registered rdma backchannel transport module.
[ 0.830967] 8021q: 802.1Q VLAN Support v1.8
[ 0.831166] 9pnet: Installing 9P2000 support
[ 0.831190] NET: Registered PF_IEEE802154 protocol family
[ 0.831211] Key type dns_resolver registered
[ 0.831483] registered taskstats version 1
[ 0.832626] Btrfs loaded, crc32c=crc32c-generic, zoned=no, fsverity=no
[ 0.843091] ff000000.serial: ttyPS0 at MMIO 0xff000000 (irq = 24, base_baud =
6249999) is a xuartps
[ 0.926889] Freeing initrd memory: 5336K
[ 2.427902] printk: console [ttyPS0] enabled
[ 2.432814] ff010000.serial: ttyPS1 at MMIO 0xff010000 (irq = 25, base_baud =
6249999) is a xuartps
[ 2.442589] of-fpga-region fpga-full: FPGA Region probed
[ 2.449762] nwl-pcie fd0e0000.pcie: host bridge /axi/pcie@fd0e0000 ranges:
[ 2.456657] nwl-pcie fd0e0000.pcie: MEM 0x00e0000000..0x00efffffff -> 0x
00e0000000
[ 2.464663] nwl-pcie fd0e0000.pcie: MEM 0x0600000000..0x07ffffffff -> 0x
0600000000
[ 2.472769] nwl-pcie fd0e0000.pcie: Link is DOWN
[ 2.477586] nwl-pcie fd0e0000.pcie: PCI host bridge to bus 0000:00
[ 2.483763] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 2.489247] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xefffffff]
[ 2.496119] pci_bus 0000:00: root bus resource [mem 0x600000000-0x7ffffffff p
ref]
[ 2.503620] pci 0000:00:00.0: [10ee:d021] type 01 class 0x060400
[ 2.509686] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 2.517532] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), rec
onfiguring
[ 2.525641] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 2.532268] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 2.541445] xilinx-zynqmp-dpdma fd4c0000.dma-controller: Xilinx DPDMA engine
is probed
[ 2.550252] zynqmp-display fd4a0000.display: vtc bridge property not present
[ 2.560281] xilinx-dp-snd-codec fd4a0000.display:zynqmp-dp-snd-codec0: Xilinx
DisplayPort Sound Codec probed
[ 2.570439] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm0: Xilinx DisplayPort Sound PC
M probed
[ 2.578553] xilinx-dp-snd-pcm zynqmp_dp_snd_pcm1: Xilinx DisplayPort Sound PC
M probed
[ 2.587812] xilinx-dp-snd-card fd4a0000.display:zynqmp-dp-snd-card: Xilinx Di
splayPort Sound Card probed
[ 2.597392] OF: graph: no port node found in /axi/display@fd4a0000
[ 2.603955] xlnx-drm xlnx-drm.0: bound fd4a0000.display (ops 0xffffffc0092144
50)
[ 3.688482] zynqmp-display fd4a0000.display: [drm] Cannot find any crtc or si
zes
[ 3.696121] [drm] Initialized xlnx 1.0.0 20130509 for fd4a0000.display on min
or 0
[ 3.703624] zynqmp-display fd4a0000.display: ZynqMP DisplayPort Subsystem dri
ver probed
[ 3.711857] ahci-ceva fd0c0000.ahci: supply ahci not found, using dummy regul
ator
[ 3.719412] ahci-ceva fd0c0000.ahci: supply phy not found, using dummy regula
tor
[ 3.726840] ahci-ceva fd0c0000.ahci: supply target not found, using dummy reg
ulator
[ 3.734659] ahci-ceva fd0c0000.ahci: AHCI 0001.0301 32 slots 2 ports 6 Gbps 0
x3 impl platform mode
[ 3.743621] ahci-ceva fd0c0000.ahci: flags: 64bit ncq sntf pm clo only pmp fb
s pio slum part ccc sds apst
[ 3.754073] scsi host0: ahci-ceva
[ 3.757683] scsi host1: ahci-ceva
[ 3.761109] ata1: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x1
00 irq 51
[ 3.769017] ata2: SATA max UDMA/133 mmio [mem 0xfd0c0000-0xfd0c1fff] port 0x1
80 irq 51
[ 3.864615] hmc7044 spi1.0: PLL1: Locked, CLKIN0 @ 100000000 Hz, PFD: 1000 kH
z - PLL2: Locked @ 2880.000000 MHz
[ 3.875081] jesd204: /axi/spi@ff050000/hmc7044@0,jesd204:1,parent=spi1.0: Usi
ng as SYSREF provider
[ 3.885568] macb ff0b0000.ethernet: Not enabling partial store and forward
[ 3.951645] macb ff0b0000.ethernet eth0: Cadence GEM rev 0x50070106 at 0xff0b
0000 irq 56 (00:01:02:03:04:05)
[ 3.961848] macb ff0e0000.ethernet: Not enabling partial store and forward
[ 4.026939] macb ff0e0000.ethernet eth1: Cadence GEM rev 0x50070106 at 0xff0e
0000 irq 58 (00:01:02:03:04:05)
[ 4.037171] xilinx-axipmon ffa00000.perf-monitor: Probed Xilinx APM
[ 4.043712] xilinx-axipmon fd0b0000.perf-monitor: Probed Xilinx APM
[ 4.050215] xilinx-axipmon fd490000.perf-monitor: Probed Xilinx APM
[ 4.056729] xilinx-axipmon ffa10000.perf-monitor: Probed Xilinx APM
[ 4.085537] cdns-i2c ff020000.i2c: can't get pinctrl, bus recovery not suppor
ted
[ 4.090674] ata1: SATA link down (SStatus 0 SControl 330)
[ 4.093300] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 4.098349] ata2: SATA link down (SStatus 0 SControl 330)
[ 4.098675] da9062 0-0058: Entering I2C mode!
[ 4.099955] da9062-watchdog: Failed to locate of_node [id: -1]
[ 4.100042] da9062-thermal: Failed to locate of_node [id: -1]
[ 4.102988] da9063-rtc da9062-rtc: registered as rtc0
[ 4.103433] da9063-rtc da9062-rtc: setting system clock to 2026-05-27T14:37:0
0 UTC (1779892620)
[ 4.103471] da9062-onkey: Failed to locate of_node [id: -1]
[ 4.103815] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus nu
mber 1
[ 4.104199]
Board Info:
[ 4.104201] BSP Version : iW-PRGBZ-SC-01-R1.0-REL1.0-ED3.0-Petalinux23.2
[ 4.104203] SOM Version : iW-PRGBZ-AP-01-R1.0
[ 4.104781] OF: graph: no port node found in /axi/i2c@ff020000/typec-portc@22
[ 4.108752] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk0
[ 4.108758] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk1
[ 4.108764] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk2
[ 4.108769] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk3
[ 4.108775] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk4
[ 4.108780] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk5
[ 4.108785] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk6
[ 4.108790] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk7
[ 4.108795] si5341 0-0076: no regulator set, defaulting vdd_sel to 2.5V for c
lk9
[ 4.111866] si5341 0-0076: Chip: 5341 Grade: 1 Rev: 3
[ 4.113641] xhci-hcd xhci-hcd.0.auto: hcc params 0x0238f625 hci version 0x100
quirks 0x0000000002010010
[ 4.163671] i2c i2c-0: Added multiplexed i2c bus 2
[ 4.167892] xhci-hcd xhci-hcd.0.auto: irq 63, io mem 0xfe200000
[ 4.169534] i2c i2c-0: Added multiplexed i2c bus 3
[ 4.176576] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller
[ 4.184123] pca953x 4-0020: supply vcc not found, using dummy regulator
[ 4.191253] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus nu
mber 2
[ 4.198710] pca953x 4-0020: using no AI
[ 4.206024] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed
[ 4.214911] pca953x 4-0021: supply vcc not found, using dummy regulator
[ 4.221095] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bc
dDevice= 6.01
[ 4.228249] pca953x 4-0021: using no AI
[ 4.235567] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=
1
[ 4.235573] usb usb1: Product: xHCI Host Controller
[ 4.244400] i2c i2c-0: Added multiplexed i2c bus 4
[ 4.248003] usb usb1: Manufacturer: Linux 6.1.70adi-v2023.2 xhci-hcd
[ 4.248009] usb usb1: SerialNumber: xhci-hcd.0.auto
[ 4.257677] at24 5-0051: supply vcc not found, using dummy regulator
[ 4.262480] hub 1-0:1.0: USB hub found
[ 4.269846] at24 5-0051: 32768 byte 24c32 EEPROM, writable, 32 bytes/write
[ 4.272886] hub 1-0:1.0: 1 port detected
[ 4.278498] at24 5-0052: supply vcc not found, using dummy regulator
[ 4.285191] usb usb2: We don't know the algorithms for LPM for this host, dis
abling LPM.
[ 4.323034] i2c i2c-0: Added multiplexed i2c bus 5
[ 4.328971] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bc
dDevice= 6.01
[ 4.333697] pca954x 0-0070: registered 4 multiplexed busses for I2C switch pc
a9546
[ 4.338475] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=
1
[ 4.344885] cdns-i2c ff020000.i2c: 400 kHz mmio ff020000 irq 62
[ 4.349690] usb usb2: Product: xHCI Host Controller
[ 4.356686] cdns-wdt fd4d0000.watchdog: Xilinx Watchdog Timer with timeout 70
s
[ 4.359767] usb usb2: Manufacturer: Linux 6.1.70adi-v2023.2 xhci-hcd
[ 4.359772] usb usb2: SerialNumber: xhci-hcd.0.auto
[ 4.367029] cdns-wdt ff150000.watchdog: Xilinx Watchdog Timer with timeout 10
s
[ 4.377105] hub 2-0:1.0: USB hub found
[ 4.387453] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_enforce_settings: U
sing QPLL without access, assuming desired Lane rate will be configured by a dif
ferent instance
[ 4.389861] hub 2-0:1.0: 1 port detected
[ 4.418646] mmc0: SDHCI controller on ff160000.mmc [ff160000.mmc] using ADMA
64-bit
[ 4.419066] xhci-hcd xhci-hcd.0.auto: remove, state 1
[ 4.419506] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: AXI-ADXCVR-RX (17.05.a) us
ing QPLL on GTY4 at 0x84A60000. Number of lanes: 2.
[ 4.420511] axi_adxcvr_drv 84b60000.axi-adxcvr-tx: AXI-ADXCVR-TX (17.05.a) us
ing QPLL on GTY4 at 0x84B60000. Number of lanes: 2.
[ 4.421133] axi-jesd204-rx 84a90000.axi-jesd204-rx: AXI-JESD204-RX (1.07.a) a
t 0x84A90000. Encoder 8b10b, width 4/4, lanes 2, jesd204-fsm.
[ 4.421567] axi-jesd204-tx 84b90000.axi-jesd204-tx: AXI-JESD204-TX (1.06.a) a
t 0x84B90000. Encoder 8b10b, width 4/4, lanes 2, jesd204-fsm.
[ 4.422442] ad9081 spi0.0: supply vdd not found, using dummy regulator
[ 4.494193] mmc0: new HS200 MMC card at address 0001
[ 4.496536] usb usb2: USB disconnect, device number 1
[ 4.508468] mmcblk0: mmc0:0001 DG4008 7.28 GiB
[ 4.520965] xhci-hcd xhci-hcd.0.auto: USB bus 2 deregistered
[ 4.540175] mmcblk0: p1
[ 4.544358] xhci-hcd xhci-hcd.0.auto: remove, state 84
[ 4.549761] mmcblk0boot0: mmc0:0001 DG4008 4.00 MiB
[ 4.553974] usb usb1: USB disconnect, device number 1
[ 4.560461] mmcblk0boot1: mmc0:0001 DG4008 4.00 MiB
[ 4.562685] xhci-hcd xhci-hcd.0.auto: USB bus 1 deregistered
[ 4.567960] mmcblk0rpmb: mmc0:0001 DG4008 4.00 MiB, chardev (239:0)
[ 4.952486] zynqmp-display fd4a0000.display: [drm] Cannot find any crtc or si
zes
[ 5.260464] random: crng init done
[ 6.396933] ad9081 spi0.0: AD9082 Rev. 3 Grade 2 (API 1.6.0) probed
[ 6.425239] cf_axi_adc 84a10000.axi-ad9081-rx-hpc: ADI AIM (10.03.\x00) at 0x
84A10000 mapped to 0x(____ptrval____) probed ADC AD9081 as MASTER
[ 6.457056] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition initialized -> probed
[ 6.467762] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition initialized -> probed
[ 6.478468] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition probed -> initialized
[ 6.489164] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition probed -> initialized
[ 6.499861] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition initialized -> probed
[ 6.510560] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition initialized -> probed
[ 6.521256] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition probed -> idle
[ 6.531348] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition probed -> idle
[ 6.541443] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition idle -> device_init
[ 6.551964] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition idle -> device_init
[ 6.562489] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> link_init
[ 6.573447] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> link_init
[ 6.584415] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> link_supported
[ 6.595633] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> link_supported
[ 6.607213] hmc7044 spi1.0: hmc7044_jesd204_link_pre_setup: Link2 forcing con
tinuous SYSREF mode
[ 6.616271] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_pre_setup
[ 6.627931] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_pre_setup
[ 6.651917] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> clk_sync_stage1
[ 6.663666] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> clk_sync_stage1
[ 6.675405] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> clk_sync_stage2
[ 6.687233] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> clk_sync_stage2
[ 6.699059] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage3
[ 6.710893] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage3
[ 6.724736] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> link_setup
[ 6.736127] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> link_setup
[ 6.753159] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> opt_setup_stage1
[ 6.764644] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> opt_setup_stage1
[ 6.784997] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> opt_setup_stage2
[ 6.797003] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> opt_setup_stage2
[ 6.809452] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage3
[ 6.821464] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage3
[ 6.833469] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage4
[ 6.845469] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage4
[ 6.857479] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage5
[ 6.869479] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage5
[ 6.885660] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> clocks_enable
[ 6.897409] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> clocks_enable
[ 6.932189] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer underflow error, status: 0x61
[ 6.942522] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer overflow error, status: 0x61
[ 6.952857] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> link_enable
[ 6.964173] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> link_enable
[ 7.224462] axi-jesd204-rx 84a90000.axi-jesd204-rx: axi_jesd204_rx_jesd204_li
nk_running: Link2 status failed (CGS)
[ 7.234813] jesd204: /fpga-axi@0/axi-jesd204-rx@84a90000,jesd204:4,parent=84a
90000.axi-jesd204-rx: JESD204[0:2] In link_running got error from cb: -1
[ 7.248204] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: Roll
ing back from 'link_enable', got error -1
[ 7.258901] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> link_running
[ 7.270120] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> link_running
[ 7.281420] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_running -> link_enable
[ 7.292638] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_running -> link_enable
[ 7.307943] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> clocks_enable
[ 7.319249] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> clocks_enable
[ 7.330554] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> opt_setup_stage5
[ 7.342293] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> opt_setup_stage5
[ 7.354037] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> opt_setup_stage4
[ 7.366034] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> opt_setup_stage4
[ 7.378032] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage3
[ 7.390034] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage3
[ 7.402031] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage2
[ 7.414030] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage2
[ 7.426035] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage1
[ 7.438034] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage1
[ 7.450035] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> link_setup
[ 7.461514] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> link_setup
[ 7.472992] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> clk_sync_stage3
[ 7.484389] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> clk_sync_stage3
[ 7.495786] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> clk_sync_stage2
[ 7.507614] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> clk_sync_stage2
[ 7.519439] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage1
[ 7.531267] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage1
[ 7.543091] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> link_pre_setup
[ 7.554832] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> link_pre_setup
[ 7.566571] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> link_supported
[ 7.578225] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> link_supported
[ 7.589876] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_init
[ 7.601096] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_init
[ 7.612318] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> device_init
[ 7.623276] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> device_init
[ 7.634231] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> idle
[ 7.644750] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> idle
[ 7.655275] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition idle -> initialized
[ 7.665798] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition idle -> initialized
[ 7.676320] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition initialized -> probed
[ 7.687011] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition initialized -> probed
[ 7.697708] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition probed -> idle
[ 7.707791] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition probed -> idle
[ 7.717882] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition idle -> device_init
[ 7.728407] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition idle -> device_init
[ 7.738934] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> link_init
[ 7.749890] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> link_init
[ 7.760851] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> link_supported
[ 7.772067] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> link_supported
[ 7.783631] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_pre_setup
[ 7.795288] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_pre_setup
[ 7.819320] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> clk_sync_stage1
[ 7.831059] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> clk_sync_stage1
[ 7.842803] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> clk_sync_stage2
[ 7.854635] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> clk_sync_stage2
[ 7.866469] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage3
[ 7.878293] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage3
[ 7.892128] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> link_setup
[ 7.903518] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> link_setup
[ 7.920368] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> opt_setup_stage1
[ 7.931851] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> opt_setup_stage1
[ 7.951007] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> opt_setup_stage2
[ 7.963012] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> opt_setup_stage2
[ 7.975417] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage3
[ 7.987420] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage3
[ 7.999429] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage4
[ 8.011426] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage4
[ 8.023428] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage5
[ 8.035427] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage5
[ 8.051577] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> clocks_enable
[ 8.063318] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> clocks_enable
[ 8.098092] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer underflow error, status: 0x61
[ 8.108428] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer overflow error, status: 0x61
[ 8.118764] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> link_enable
[ 8.130070] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> link_enable
[ 8.392463] axi-jesd204-rx 84a90000.axi-jesd204-rx: axi_jesd204_rx_jesd204_li
nk_running: Link2 status failed (CGS)
[ 8.402810] jesd204: /fpga-axi@0/axi-jesd204-rx@84a90000,jesd204:4,parent=84a
90000.axi-jesd204-rx: JESD204[0:2] In link_running got error from cb: -1
[ 8.416201] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: Roll
ing back from 'link_enable', got error -1
[ 8.426898] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> link_running
[ 8.438118] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> link_running
[ 8.449413] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_running -> link_enable
[ 8.460640] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_running -> link_enable
[ 8.475941] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> clocks_enable
[ 8.487247] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> clocks_enable
[ 8.498551] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> opt_setup_stage5
[ 8.510291] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> opt_setup_stage5
[ 8.522035] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> opt_setup_stage4
[ 8.534031] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> opt_setup_stage4
[ 8.546030] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage3
[ 8.558031] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage3
[ 8.570029] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage2
[ 8.582027] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage2
[ 8.594033] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage1
[ 8.606034] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage1
[ 8.618033] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> link_setup
[ 8.629512] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> link_setup
[ 8.640990] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> clk_sync_stage3
[ 8.652388] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> clk_sync_stage3
[ 8.663784] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> clk_sync_stage2
[ 8.675613] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> clk_sync_stage2
[ 8.687437] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage1
[ 8.699264] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage1
[ 8.711099] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> link_pre_setup
[ 8.722839] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> link_pre_setup
[ 8.734578] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> link_supported
[ 8.746233] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> link_supported
[ 8.757883] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_init
[ 8.769104] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_init
[ 8.780325] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> device_init
[ 8.791281] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> device_init
[ 8.802238] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> idle
[ 8.812768] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> idle
[ 8.823300] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition idle -> initialized
[ 8.833822] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition idle -> initialized
[ 8.844346] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition initialized -> probed
[ 8.855044] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition initialized -> probed
[ 8.865741] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition probed -> idle
[ 8.875833] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition probed -> idle
[ 8.885922] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition idle -> device_init
[ 8.896440] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition idle -> device_init
[ 8.906976] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> link_init
[ 8.917931] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> link_init
[ 8.928893] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> link_supported
[ 8.940108] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> link_supported
[ 8.951671] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_pre_setup
[ 8.963332] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_pre_setup
[ 8.987299] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> clk_sync_stage1
[ 8.999040] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> clk_sync_stage1
[ 9.010784] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> clk_sync_stage2
[ 9.022612] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> clk_sync_stage2
[ 9.034441] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage3
[ 9.046264] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage3
[ 9.060103] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> link_setup
[ 9.071498] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> link_setup
[ 9.088346] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> opt_setup_stage1
[ 9.099823] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> opt_setup_stage1
[ 9.118982] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> opt_setup_stage2
[ 9.130984] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> opt_setup_stage2
[ 9.143389] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage3
[ 9.155392] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage3
[ 9.167402] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage4
[ 9.179400] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage4
[ 9.191400] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage5
[ 9.203400] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage5
[ 9.219550] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> clocks_enable
[ 9.231290] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> clocks_enable
[ 9.266063] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer underflow error, status: 0x61
[ 9.276401] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer overflow error, status: 0x61
[ 9.286736] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> link_enable
[ 9.298041] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> link_enable
[ 9.560461] axi-jesd204-rx 84a90000.axi-jesd204-rx: axi_jesd204_rx_jesd204_li
nk_running: Link2 status failed (CGS)
[ 9.570809] jesd204: /fpga-axi@0/axi-jesd204-rx@84a90000,jesd204:4,parent=84a
90000.axi-jesd204-rx: JESD204[0:2] In link_running got error from cb: -1
[ 9.584200] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: Roll
ing back from 'link_enable', got error -1
[ 9.594896] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> link_running
[ 9.606118] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> link_running
[ 9.617412] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_running -> link_enable
[ 9.628638] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_running -> link_enable
[ 9.643934] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> clocks_enable
[ 9.655237] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> clocks_enable
[ 9.666540] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> opt_setup_stage5
[ 9.678282] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> opt_setup_stage5
[ 9.690024] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> opt_setup_stage4
[ 9.702021] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> opt_setup_stage4
[ 9.714021] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage3
[ 9.726021] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage3
[ 9.738020] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage2
[ 9.750026] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage2
[ 9.762029] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage1
[ 9.774030] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage1
[ 9.786031] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> link_setup
[ 9.797514] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> link_setup
[ 9.808997] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> clk_sync_stage3
[ 9.820395] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> clk_sync_stage3
[ 9.831792] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> clk_sync_stage2
[ 9.843618] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> clk_sync_stage2
[ 9.855443] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage1
[ 9.867271] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage1
[ 9.879096] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> link_pre_setup
[ 9.890837] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> link_pre_setup
[ 9.902577] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> link_supported
[ 9.914230] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> link_supported
[ 9.925881] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_init
[ 9.937093] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_init
[ 9.948314] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> device_init
[ 9.959271] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> device_init
[ 9.970227] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> idle
[ 9.980755] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> idle
[ 9.991279] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition idle -> initialized
[ 10.001802] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition idle -> initialized
[ 10.012325] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition initialized -> probed
[ 10.023025] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition initialized -> probed
[ 10.033722] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition probed -> idle
[ 10.043814] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition probed -> idle
[ 10.053904] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition idle -> device_init
[ 10.064428] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition idle -> device_init
[ 10.074956] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> link_init
[ 10.085912] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> link_init
[ 10.096874] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> link_supported
[ 10.108089] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> link_supported
[ 10.119652] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_pre_setup
[ 10.131311] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_pre_setup
[ 10.155277] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> clk_sync_stage1
[ 10.167020] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> clk_sync_stage1
[ 10.178765] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> clk_sync_stage2
[ 10.190599] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> clk_sync_stage2
[ 10.202431] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage3
[ 10.214254] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage3
[ 10.228090] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> link_setup
[ 10.239479] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> link_setup
[ 10.256320] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> opt_setup_stage1
[ 10.267804] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> opt_setup_stage1
[ 10.286932] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> opt_setup_stage2
[ 10.298930] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> opt_setup_stage2
[ 10.311333] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage3
[ 10.323339] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage3
[ 10.335348] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage4
[ 10.347345] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage4
[ 10.359346] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage5
[ 10.371345] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage5
[ 10.387496] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> clocks_enable
[ 10.399236] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> clocks_enable
[ 10.434018] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer underflow error, status: 0x61
[ 10.444355] axi_adxcvr_drv 84a60000.axi-adxcvr-rx: adxcvr_clk_enable: QPLL RX
buffer overflow error, status: 0x61
[ 10.454692] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> link_enable
[ 10.466005] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> link_enable
[ 10.728459] axi-jesd204-rx 84a90000.axi-jesd204-rx: axi_jesd204_rx_jesd204_li
nk_running: Link2 status failed (CGS)
[ 10.738806] jesd204: /fpga-axi@0/axi-jesd204-rx@84a90000,jesd204:4,parent=84a
90000.axi-jesd204-rx: JESD204[0:2] In link_running got error from cb: -1
[ 10.752197] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: Roll
ing back from 'link_enable', got error -1
[ 10.762895] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> link_running
[ 10.774113] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> link_running
[ 10.785409] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_running -> link_enable
[ 10.796636] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_running -> link_enable
[ 10.811933] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_enable -> clocks_enable
[ 10.823235] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_enable -> clocks_enable
[ 10.834539] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clocks_enable -> opt_setup_stage5
[ 10.846279] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clocks_enable -> opt_setup_stage5
[ 10.858023] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage5 -> opt_setup_stage4
[ 10.870019] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage5 -> opt_setup_stage4
[ 10.882018] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage4 -> opt_setup_stage3
[ 10.894019] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage4 -> opt_setup_stage3
[ 10.906018] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage3 -> opt_setup_stage2
[ 10.918023] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage3 -> opt_setup_stage2
[ 10.930029] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage2 -> opt_setup_stage1
[ 10.942029] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage2 -> opt_setup_stage1
[ 10.954030] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition opt_setup_stage1 -> link_setup
[ 10.965508] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition opt_setup_stage1 -> link_setup
[ 10.976986] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_setup -> clk_sync_stage3
[ 10.988384] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_setup -> clk_sync_stage3
[ 10.999781] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage3 -> clk_sync_stage2
[ 11.011607] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage3 -> clk_sync_stage2
[ 11.023433] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage2 -> clk_sync_stage1
[ 11.035260] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage2 -> clk_sync_stage1
[ 11.047087] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition clk_sync_stage1 -> link_pre_setup
[ 11.058827] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition clk_sync_stage1 -> link_pre_setup
[ 11.070565] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_pre_setup -> link_supported
[ 11.082221] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_pre_setup -> link_supported
[ 11.093871] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_supported -> link_init
[ 11.105091] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_supported -> link_init
[ 11.116313] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition link_init -> device_init
[ 11.127269] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition link_init -> device_init
[ 11.138225] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:0] transition device_init -> idle
[ 11.148751] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: JESD
204[0:2] transition device_init -> idle
[ 11.159273] jesd204: /axi/spi@ff040000/ad9081@0,jesd204:0,parent=spi0.0: FSM
completed with error -1
[ 11.168409] cf_axi_dds 84b10000.axi-ad9081-tx-hpc: Analog Devices CF_AXI_DDS_
DDS MASTER (9.02.b) at 0x84B10000 mapped to 0x000000001b6dc010, probed DDS AD908
1
[ 11.185646] of_cfs_init
[ 11.188115] of_cfs_init: OK
[ 11.192692] ALSA device list:
[ 11.195644] #0: DP mon
[ 11.216037] mmc1: SDHCI controller on ff170000.mmc [ff170000.mmc] using ADMA
64-bit
[ 11.224367] Freeing unused kernel memory: 2816K
[ 11.228946] Run /init as init process
[ 11.232601] with arguments:
[ 11.232604] /init
[ 11.232607] earlyprintk
[ 11.232609] with environment:
[ 11.232612] HOME=/
[ 11.232615] TERM=linux
[ 11.316736] mmc1: new ultra high speed SDR104 SDHC card at address aaaa
[ 11.323789] mmcblk1: mmc1:aaaa SE32G 29.7 GiB
[ 11.331205] mmcblk1: p1 p2
[ 13.484044] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Q
uota mode: none.
[ 13.685735] systemd[1]: systemd 251.8+ running in system mode (+PAM -AUDIT -S
ELINUX -APPARMOR +IMA -SMACK +SECCOMP -GCRYPT -GNUTLS -OPENSSL +ACL +BLKID -CURL
-ELFUTILS -FIDO2 -IDN2 -IDN -IPTC +KMOD -LIBCRYPTSETUP +LIBFDISK -PCRE2 -PWQUAL
ITY -P11KIT -QRENCODE -TPM2 -BZIP2 -LZ4 -XZ -ZLIB +ZSTD -BPF_FRAMEWORK +XKBCOMMO
N +UTMP +SYSVINIT default-hierarchy=hybrid)
[ 13.717531] systemd[1]: Detected architecture arm64.
[ 13.791828] systemd[1]: Hostname set to <zynqmp-iwg35m>.
[ 13.876816] systemd-sysv-generator[255]: SysV service '/etc/init.d/bootscript
' lacks a native systemd unit file. Automatically generating a unit file for com
patibility. Please update package to include a native systemd unit file, in orde
r to make it more safe and robust.
[ 13.910835] systemd-sysv-generator[255]: SysV service '/etc/init.d/sendsigs'
lacks a native systemd unit file. Automatically generating a unit file for compa
tibility. Please update package to include a native systemd unit file, in order
to make it more safe and robust.
[ 13.934841] systemd-sysv-generator[255]: SysV service '/etc/init.d/sshd' lack
s a native systemd unit file. Automatically generating a unit file for compatibi
lity. Please update package to include a native systemd unit file, in order to m
ake it more safe and robust.
[ 13.959958] systemd-sysv-generator[255]: SysV service '/etc/init.d/halt' lack
s a native systemd unit file. Automatically generating a unit file for compatibi
lity. Please update package to include a native systemd unit file, in order to m
ake it more safe and robust.
[ 13.984931] systemd-sysv-generator[255]: SysV service '/etc/init.d/inetd.busy
box' lacks a native systemd unit file. Automatically generating a unit file for
compatibility. Please update package to include a native systemd unit file, in o
rder to make it more safe and robust.
[ 14.009909] systemd-sysv-generator[255]: SysV service '/etc/init.d/umountnfs.
sh' lacks a native systemd unit file. Automatically generating a unit file for c
ompatibility. Please update package to include a native systemd unit file, in or
der to make it more safe and robust.
[ 14.034665] systemd-sysv-generator[255]: SysV service '/etc/init.d/umountfs'
lacks a native systemd unit file. Automatically generating a unit file for compa
tibility. Please update package to include a native systemd unit file, in order
to make it more safe and robust.
[ 14.059752] systemd-sysv-generator[255]: SysV service '/etc/init.d/save-rtc.s
h' lacks a native systemd unit file. Automatically generating a unit file for co
mpatibility. Please update package to include a native systemd unit file, in ord
er to make it more safe and robust.
[ 14.084518] systemd-sysv-generator[255]: SysV service '/etc/init.d/single' la
cks a native systemd unit file. Automatically generating a unit file for compati
bility. Please update package to include a native systemd unit file, in order to
make it more safe and robust.
[ 14.108266] systemd-sysv-generator[255]: SysV service '/etc/init.d/watchdog-i
nit' lacks a native systemd unit file. Automatically generating a unit file for
compatibility. Please update package to include a native systemd unit file, in o
rder to make it more safe and robust.
[ 14.132764] systemd-sysv-generator[255]: SysV service '/etc/init.d/reboot' la
cks a native systemd unit file. Automatically generating a unit file for compati
bility. Please update package to include a native systemd unit file, in order to
make it more safe and robust.
[ 14.415477] systemd[1]: Queued start job for default target Graphical Interfa
ce.
[ 14.482207] systemd[1]: Created slice Slice /system/getty.
[ 14.505991] systemd[1]: Created slice Slice /system/modprobe.
[ 14.530302] systemd[1]: Created slice Slice /system/serial-getty.
[ 14.553563] systemd[1]: Created slice User and Session Slice.
[ 14.576712] systemd[1]: Started Dispatch Password Requests to Console Directo
ry Watch.
[ 14.600658] systemd[1]: Started Forward Password Requests to Wall Directory W
atch.
[ 14.624784] systemd[1]: Reached target Path Units.
[ 14.640567] systemd[1]: Reached target Remote File Systems.
[ 14.660538] systemd[1]: Reached target Slice Units.
[ 14.676578] systemd[1]: Reached target Swaps.
[ 14.693038] systemd[1]: Listening on RPCbind Server Activation Socket.
[ 14.716562] systemd[1]: Reached target RPC Port Mapper.
[ 14.738972] systemd[1]: Listening on Syslog Socket.
[ 14.752723] systemd[1]: Listening on initctl Compatibility Named Pipe.
[ 14.777201] systemd[1]: Listening on Journal Audit Socket.
[ 14.796871] systemd[1]: Listening on Journal Socket (/dev/log).
[ 14.820982] systemd[1]: Listening on Journal Socket.
[ 14.837189] systemd[1]: Listening on Network Service Netlink Socket.
[ 14.861048] systemd[1]: Listening on udev Control Socket.
[ 14.880840] systemd[1]: Listening on udev Kernel Socket.
[ 14.900907] systemd[1]: Listening on User Database Manager Socket.
[ 14.940824] systemd[1]: Mounting Huge Pages File System...
[ 14.960225] systemd[1]: Mounting POSIX Message Queue File System...
[ 14.988434] systemd[1]: Mounting Kernel Debug File System...
[ 15.005019] systemd[1]: Kernel Trace File System was skipped because of a fai
led condition check (ConditionPathExists=/sys/kernel/tracing).
[ 15.023621] systemd[1]: Mounting Temporary Directory /tmp...
[ 15.043516] systemd[1]: Create List of Static Device Nodes was skipped becaus
e of a failed condition check (ConditionFileNotEmpty=/lib/modules/6.1.70adi-v202
3.2/modules.devname).
[ 15.063730] systemd[1]: Starting Load Kernel Module configfs...
[ 15.084836] systemd[1]: Starting Load Kernel Module drm...
[ 15.104706] systemd[1]: Starting Load Kernel Module fuse...
[ 15.126966] systemd[1]: Starting RPC Bind...
[ 15.140846] systemd[1]: File System Check on Root Device was skipped because
of a failed condition check (ConditionPathIsReadWrite=!/).
[ 15.154122] systemd[1]: systemd-journald.service: unit configures an IP firew
all, but the local system does not support BPF/cgroup firewalling.
[ 15.167053] systemd[1]: (This warning is only shown for the first unit using
IP firewalling.)
[ 15.196968] systemd[1]: Starting Journal Service...
[ 15.215549] systemd[1]: Load Kernel Modules was skipped because all trigger c
ondition checks failed.
[ 15.227440] systemd[1]: Mounting NFSD configuration filesystem...
[ 15.248859] systemd[1]: Starting Generate network units from Kernel command l
ine...
[ 15.276766] systemd[1]: Starting Remount Root and Kernel File Systems...
[ 15.298417] EXT4-fs (mmcblk1p2): re-mounted. Quota mode: none.
[ 15.315686] systemd[1]: Starting Apply Kernel Variables...
[ 15.337536] systemd[1]: Starting Coldplug All udev Devices...
[ 15.360238] systemd[1]: Started RPC Bind.
[ 15.373242] systemd[1]: Mounted Huge Pages File System.
[ 15.389134] systemd[1]: Mounted POSIX Message Queue File System.
[ 15.405150] systemd[1]: Mounted Kernel Debug File System.
[ 15.421007] systemd[1]: Mounted Temporary Directory /tmp.
[ 15.437439] systemd[1]: modprobe@configfs.service: Deactivated successfully.
[ 15.438243] systemd[1]: Finished Load Kernel Module configfs.
[ 15.453436] systemd[1]: modprobe@drm.service: Deactivated successfully.
[ 15.454244] systemd[1]: Finished Load Kernel Module drm.
[ 15.469460] systemd[1]: modprobe@fuse.service: Deactivated successfully.
[ 15.470249] systemd[1]: Finished Load Kernel Module fuse.
[ 15.485258] systemd[1]: Mounted NFSD configuration filesystem.
[ 15.501729] systemd[1]: Finished Generate network units from Kernel command l
ine.
[ 15.517268] systemd[1]: Started Journal Service.
[ 15.643719] systemd-journald[265]: Received client request to flush runtime j
ournal.
[ 17.211776] mali: loading out-of-tree module taints kernel.
[ 17.348531] dp159 0-005b: probed
[ 17.351539] dp159 0-005b: probe successful
[ 17.380164] remoteproc remoteproc0: ff9a0000.rf5ss:r5f_0 is available
[ 17.380244] platform ff9a0000.rf5ss:r5f_0: rsc tbl property not provided
[ 18.779956] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data
may be corrupt. Please run fsck.
[ 20.289359] macb ff0e0000.ethernet eth1: validation of rgmii-id with support
00,00000000,00000000,00006280 and advertisement 00,00000000,00000000,00004280 fa
iled: -EINVAL
[ 20.289553] macb ff0e0000.ethernet eth1: Could not attach PHY (-22)
[ 20.365312] macb ff0b0000.ethernet eth0: PHY [ff0b0000.ethernet-ffffffff:01]
driver [Qualcomm Atheros AR8031/AR8033] (irq=57)
[ 20.365573] macb ff0b0000.ethernet eth0: configuring for phy/rgmii-id link mo
de
[ 20.365831] pps pps0: new PPS source ptp0
[ 20.365949] macb ff0b0000.ethernet: gem-ptp-timer ptp clock registered.
[ 23.490367] macb ff0b0000.ethernet eth0: Link is Up - 1Gbps/Full - flow contr
ol off
[ 23.502406] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 23.525863] audit: type=1006 audit(1779892639.920:2): pid=779 uid=0 old-auid=
4294967295 auid=0 tty=(none) old-ses=4294967295 ses=1 res=1
[ 23.538201] audit: type=1300 audit(1779892639.920:2): arch=c00000b7 syscall=6
4 success=yes exit=1 a0=8 a1=7ff3535350 a2=1 a3=1 items=0 ppid=1 pid=779 auid=0
uid=0 gid=0 euid=0 suid=0 fsuid=0 egid=0 sgid=0 fsgid=0 tty=(none) ses=1 comm="(
systemd)" exe="/lib/systemd/systemd" key=(null)
[ 23.563361] audit: type=1327 audit(1779892639.920:2): proctitle="(systemd)"
[ 178.458487] audit: type=1006 audit(1779892793.689:3): pid=812 uid=0 old-auid=
4294967295 auid=1000 tty=(none) old-ses=4294967295 ses=2 res=1
[ 178.471056] audit: type=1300 audit(1779892793.689:3): arch=c00000b7 syscall=6
4 success=yes exit=4 a0=8 a1=7ff3535350 a2=4 a3=0 items=0 ppid=1 pid=812 auid=10
00 uid=0 gid=0 euid=0 suid=0 fsuid=0 egid=0 sgid=0 fsgid=0 tty=(none) ses=2 comm
="(systemd)" exe="/lib/systemd/systemd" key=(null)
[ 178.496449] audit: type=1327 audit(1779892793.689:3): proctitle="(systemd)"
[ 179.955961] audit: type=1006 audit(1779892795.185:4): pid=808 uid=0 old-auid=
4294967295 auid=1000 tty=(none) old-ses=4294967295 ses=3 res=1
[ 179.968603] audit: type=1300 audit(1779892795.185:4): arch=c00000b7 syscall=6
4 success=yes exit=4 a0=7 a1=7fea1c6be0 a2=4 a3=1 items=0 ppid=1 pid=808 auid=10
00 uid=0 gid=0 euid=0 suid=0 fsuid=0 egid=0 sgid=0 fsgid=0 tty=(none) ses=3 comm
="sshd" exe="/usr/sbin/sshd" key=(null)
[ 179.993041] audit: type=1327 audit(1779892795.185:4): proctitle=737368643A206
16E616C6F67205B707269765D
root@zynqmp-iwg35m:~#
Please let me know if there is any more info I can provide,
I would appreciate any help and insight on the matter.
Thanks,
OR1
