Hi,
The AD9081 Datasheet (link) indicates SYSREF_P/N input differential voltage is 0.7V min and 1.9V max differential pk-pk.
However the AD9081/AD9082 SW Development UG, UG-1578 (link) indicates it's 0.2V min and 2.0V max differential pk-pk
Can you please confirm whether the user-guide or the datasheet is in error here? I would like to confirm whether the differential pk-pk max is 1.9V or 2.0V. If it's 2.0V max then from HMC7043 datasheet CML output power graph and common mode voltage spec it seems that using the HMC7043 output in CML mode may be easier (fewer passive components needed on board) to achieve DC-coupled SYSREF to AD9081 without violating min/max voltage requirements than other methods ADI has documented in the user-guide.
I understand from the absolute max values section in the AD9081 datasheet that the voltage relative to ground on either pin should not pass 2.5V.
Thanks!
