AD9209 SYSREF Configuration

Kindly let me know the register settings to enable the Differential termination for DC Coupled LVDS sysref at AD9209

Hi, It is strongly recommended to use API calls instead of programming individual registers. For example, you can adjust the SYSREF input configuration—including DC/AC coupling, signal type (CML, LVDS, etc.), and differential/single-ended termination—using the adi_adxxxx_sync_sysref_input_config_set API call. As a general rule, if you notice any discrepancies between the API documentation and the user guide, please prioritize the API. It's more likely to be up-to-date and tested with each new release.It appears the differential termination impedance for SYSREF is fixed at 100 ohms when enabled.

Please let us know if you need any further clarification.

-YH

Thanks for the clarification.

But I am unable to find differential termination enable/disable feature in below API. 

int32_t adi_ad9081_sync_sysref_input_config_set(
adi_ad9081_device_t *device, adi_cms_signal_coupling_e coupling_mode,
adi_cms_signal_type_e signal_type, uint8_t sysref_single_end_p,
uint8_t sysref_single_end_n)
{
int32_t err;
AD9081_LOG_FUNC();
AD9081_NULL_POINTER_RETURN(device);
AD9081_INVALID_PARAM_RETURN(sysref_single_end_n > 15 ||
sysref_single_end_n < 0);
AD9081_INVALID_PARAM_RETURN(sysref_single_end_p > 15 ||
sysref_single_end_p < 0);
AD9081_INVALID_PARAM_RETURN(coupling_mode != COUPLING_AC &&
coupling_mode != COUPLING_DC);
AD9081_INVALID_PARAM_RETURN(signal_type == SIGNAL_UNKNOWN);

if ((coupling_mode == COUPLING_AC &&
(signal_type == SIGNAL_LVDS || signal_type == SIGNAL_CML ||
signal_type == SIGNAL_LVPECL)) ||
coupling_mode == COUPLING_DC) {
err = adi_ad9081_jesd_sysref_input_mode_set(
device, 1, 1,
(signal_type == SIGNAL_LVDS ||
signal_type == SIGNAL_CML ||
signal_type == SIGNAL_LVPECL) ?
0 :
1);
AD9081_ERROR_RETURN(err);
err = adi_ad9081_jesd_sysref_d2acenter_enable_set(device, 1);
AD9081_ERROR_RETURN(err);
err = adi_ad9081_hal_bf_set(
device, 0x0fb9, 0x100,
(coupling_mode == COUPLING_AC) ?
0 :
1); /* not paged, sysref_dc_mode_sel */
AD9081_ERROR_RETURN(err);
err = adi_ad9081_hal_bf_set(
device, 0x0fb9, 0x104,
(signal_type == SIGNAL_CMOS) ?
1 :
0); /* not paged, sysref_single_end_mode_sel */
AD9081_ERROR_RETURN(err);

/* for 1.8V CMOS or higher, set ground ref resistor to 6.3 kohm. For 1.5V CMOS, set to 7.9 kohm.*/
if (signal_type == SIGNAL_CMOS) {
err = adi_ad9081_hal_bf_set(
device, 0x0fba, 0x400,
sysref_single_end_p); /* not paged, sysref_single_end_p */
AD9081_ERROR_RETURN(err);
err = adi_ad9081_hal_bf_set(
device, 0x0fba, 0x404,
sysref_single_end_n); /* not paged, sysref_single_end_n */
AD9081_ERROR_RETURN(err);
}
err = adi_ad9081_jesd_sysref_d2acenter_enable_set(device, 0);
AD9081_ERROR_RETURN(err);
} else {
AD9081_LOG_ERR(
"The SYSREF receiver input buffer cannot be configured in the mode specified.");
return API_CMS_ERROR_INVALID_PARAM;
}

return API_CMS_ERROR_OK;
}

My Requirement is DC-Coupled LVDS input with internal Differential Termination

So, API shall be modified to 

int32_t adi_ad9081_sync_sysref_input_config_set(
adi_ad9081_device_t *device, adi_cms_signal_coupling_e COUPLING_DC,
adi_cms_signal_type_e SIGNAL_LVDS, uint8_t sysref_single_end_p,
uint8_t sysref_single_end_n)

uint8_t sysref_single_end_p, uint8_t sysref_single_end_n shall be configured only if the mode is single ended input. So, what is the parameter to be passed in the above listed API to enable/disable internal differential termination

I made a mistake in the reply that I deleted. Sorry about that. Let me take a look and get back to you.

Looking at the example API for ADI reference platform, which requires AC coupling/CML/Differential configuration and it is programmed as follows. I believe this is how differential termination is enabled.

Hope this helps.

Okay. Is the Differential termination enabled for DC Coupled, LVDS input? Same mode(DC Coupled, LVDS Input) was used in QUAD-MxFE Platform

The reference platform I was referring to is ADS9/AD9081(or 2)-FMCA-EBZ. Not sure how it is done in the Quad MxFE platform. I can check and come back to you later. Do you have Quad MxFE platform and you are using it as a reference?

I don't have Quad-MxFE Platform. We are doing Multi-chip synchronisation as same as Quad-MxFE.(Clocking Architecture as same as Quad-MxFE)