I am trying to use the AD9081-FMCA-EBZ evaluation board to test a few JESD204C configurations. However, when I try to do any chip view configurations, I receive Error Code: -14 and a notice is displayed that there is a problem with configuring the HMC7044. I am using the on-board LVDS mode reference crystal of 100 MHz for HMC7044 reference clocking (CCPD33CB 100M) and requesting a 234.375 MHz frequency out of the HMC7044. We have verified this is possible on the HMC7044 standalone evaluation board.
When I apply a board preset configuration it goes from Figure 1 to Figure 2 and no error pop-up windows appear.
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| Figure 1: ACE AD9081 Board View Before Applying Settings | Figure 2: ACE AD9081 Board View After Applying Settings |
However, when I apply a chip view custom configuration, it goes from Figure 3 to Figure 4, displaying two pop-up windows relating to clock configuration errors.
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| Figure 3: ACE AD9081 Chip View Before Applying Settings | Figure 4: ACE AD9081 Chip View After Attempting to Apply Settings |
These same errors occurred for this configuration (JESD204C TX=24 RX=26 DCM=2 interp=8) when providing a reference clock to the HMC7044 instead of the on-board VCXO. A board preset was configured first to ensure this was not a reference clocking setup issue.
I also attempted to use an external clock and bypass the HMC7044. Similar results followed, the board level presets worked but the chip view configurations did not. The following errors show up when trying to use an external clock instead of the HMC7044. In chip view, I tried using 100 MHz and 234.375 MHz reference signals and changed the chip ref clock setting accordingly. The following errors and the clock configuration setting for the 234.375 MHz value are shown below (the tool automatically rounds up to 234.38 MHz). I tried both clock values with and without the Enable On-Chip PLL setting enabled.
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| Figure 5: First transaction error when applying chip configurations | Figure 6: Second transaction error when applying chip configurations | Figure 7: Clock source options |
One additional note is that regardless of clocking scheme, if I configure successfully using board view, then configure using chip view and it fails, I cannot configure successfully from board view without restarting ACE. This makes me think that configuring with chip view modifies extra registers somewhere (HMC7044, AD9081, etc.)
So I have a few main questions: first, is there a resource that lists all of the error codes that one can encounter in ACE? I have done some searching online, but been unsuccessful. Second, I am guessing that there is a problem with how the AD9081 is trying to configure the HMC7044 when I try to use it for clocking or some internal PLL issue when I try using the direct clocking method. Does anyone have ideas/knowledge of what the ConfigureTRX or ConfigureHMC7044 errors indicate or how to solve them? Also is it possible there is some error with the HMC7044 frequency convergence that is preventing us from being able to use this frequency output from the HMC7044?
