How to improve AD8346 performance considering its SSB phase noise

Question

I am considering the impact of discrete spur emission and SSB phase noise of this part. Could you please suggest if there is a way to reduce these sprurs by adjusting the relative phase of the I and Q input and by adding DC offsets on the I and Q inputs? I am trying to meet the requirement shown below.

Offset from transmit carrier frequency (Hz)	SSB Phase noise limit in 1 Hz bandwidth (dBc)
10	-35
100	-55
1,000	-73
10,000	-75
100,000	-90
>100,000	-90

Offset from transmit carrier frequency (Hz) 
 SSB Phase noise limit in 1 Hz bandwidth (dBc)

10 
 -35

100 
 -55

1,000 
 -73

10,000 
 -75

100,000 
 -90

>100,000 
 -90

THA · Accepted Answer

The phase noise at the output of and IQ modulator comes mainly from the Local Oscillator input and from the LO path inside the IQ Modulator. As you can see below, the phase noise of local oscillator signal spreads the desired signal. So if you want to get the phase noise you specified you need to start by selecting the right PLL to drive the IQ Modulator. 
 
 When the IQ Modulator is driven by quadrature I and Q signals (e.g. sine and cosine signals each at 1 MHz), the primary undesired signals that appear at the output are Local Oscillator feedthrough and an unwanted upper sideband. LO leakage, undesired sideband and baseband harmonics affect EVM. Baseband offset compensation can be used to reduce LO leakage and amplitude and phase compensation can be used to improve sideband suppression. For more information on this, please refer attached file .

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How to improve AD8346 performance considering its SSB phase noise