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ADF4001 clock synchronization


We're planning to use an ADF4001 with an external TCVCXO to synchronize the 50Mhz clock output of the TCVCXO to an input 5Mhz clock. Our requirements are that:

1- The incoming 5Mhz clock signal may or may not be present, ie, even if it is cutoff, we need to be able to continuously receive a 50Mhz clock from the TCVCXO output.

2- Preferably, we'd like to power the ADF4001 with 3.3V

The way we're currently planning to use this part is that, we'll feed the external 5Mhz clock to RefIn input, don't divide this clock so the phase detector also runs at 5Mhz, connect the CP output to a TCVCXO, then use the output of the TCVCXO and feed it back to the RFin input, setting up the input  divider to divide by 10.

Now here are my questions:

1 - One thing we noticed with the ADF4XXX series is that, in some of the parts, there is a note that says :"For lower (than 5Mhz) RefIn frequencies, ensure SR > 30 V/μs". Since we'll be running right at 5Mhz, should we be concerned with this requirement?

2 - For ADF4001 specifically, this RFin requirement is stated as :“For f < 5 MHz, Use DC-Coupled Square Wave (0 to VDD)”. So there is no specification for the slew rate specifically. Is that just an oversight or is the slew rate not very important for this part?

3- Can you recommend a TCVCXO to use along with this part that can give us 50Mhz output?