ADL5391 used as low frequency multiplier


I decided to test the ADL5391 to multiply two 50 kHz signals phase shifted (power measurement).

Line XPLS and YPLS and output WPLS are used, a 100nF DC blocking capacitor is used at X-Y PLS input. Before the DC blocking capacitors, the AC signals is  DC offset by 1.65V (this is correct, it depends on my above circuitry), the AC component is less than 2Vpp. After the DC blocking capacitors, the signal are 2.5V DC offset (midsupply of ADL5391),

XMNS, YMNS and WMNS are connected to the GND through a 100nF capacitor (is that correct?).  PLS and MNS are connected with 56 Ohms resistors

GADJ is left open

VMID is connected with 100 nF to GND.

Z PLS and MNS are left open

The system draws about 30 mA under 5V in Standby. As I enabled the IC, it draws about 250 mA. This seems not normal ! The output WPLS stay to 0V.

Has somebody already used this IC at low frequency in a multiplier configuration ?

What about the MNS inputs/outputs, should I connect it as mentionned above (through 100nF capacitor as in the evaluation board schematics) ?

Thanks for your inputs !