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ADF4212L power up sequence through rate

Hi,

As a local distributor, our customer is facing to error when starting up ADF4212L. By studying in the customer's side, they found VDD1=VDD2=3.3V might be a cause when it relatively slow / long ramp-up period, as shown in below at yellow line indicates.

It seems there is no description defined in datasheet in regard to power up, so if you provide required specification how long, how fast, how steep or any to achieve normal start up of this PLL device. Other words, the customer may be able to see good result when shorten above ramp-up period, but feeling needs to confirm what is defined power up sequences.

Any of your comments or supports would be very much appreciated.

Parents
  • Dear Grzegorz,

     

    Even if problem situation is "test mode" and the customer can clear it for

    normal usage, I'm afraid this solution may not satisfy the customer.

    I have asked this to the customer, and now waiting for their input, however,

    meanwhile, could you please let us know,

     

    a) What is test mode, and what's the purpose of test mode at ADF4212L ?

    (Probebly it's only for ADI internal usage ?)

        I could not find out any technical documentation which is describing it.

    b) Can you see any possible reason/trigger why it goes into test mode, if it

    is ?

     

    Sorry to these basic questions, and appreciate you helps bringing to

    understand.

     

    Best Regards,

Reply
  • Dear Grzegorz,

     

    Even if problem situation is "test mode" and the customer can clear it for

    normal usage, I'm afraid this solution may not satisfy the customer.

    I have asked this to the customer, and now waiting for their input, however,

    meanwhile, could you please let us know,

     

    a) What is test mode, and what's the purpose of test mode at ADF4212L ?

    (Probebly it's only for ADI internal usage ?)

        I could not find out any technical documentation which is describing it.

    b) Can you see any possible reason/trigger why it goes into test mode, if it

    is ?

     

    Sorry to these basic questions, and appreciate you helps bringing to

    understand.

     

    Best Regards,

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