I am attempting to simulate a design using a Crystek VCO (CV55CL0120-0130) and an ADF4111. I would like a single output frequency of 125MHz using a reference of 44.8MHz. However, no matter what I seem to use for the parameters, ADIsimPLL gives me an error. I receive either an input capacitance too large error, or a time domain simulation failure. Can someone provide any assistance? I have attached the design file for reference.