ADIsimPLL : Crystek VCO with ADF4111 Question

Hello,

I am attempting to simulate a design using a Crystek VCO (CV55CL0120-0130) and an ADF4111. I would like a single output frequency of 125MHz using a reference of 44.8MHz. However, no matter what I seem to use for the parameters, ADIsimPLL gives me an error. I receive either an input capacitance too large error, or a time domain simulation failure. Can someone provide any assistance? I have attached the design file for reference.

Thanks,

Steve

ADF4111-125MHz.pll.zip
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    •  Analog Employees 
    on Aug 2, 2018 4:43 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

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    EZ Admin
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    •  Analog Employees 
    on Aug 2, 2018 4:43 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
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