I'm in a process of testing UG-435 evaluation board for ADF4351 PLL IC.
With any phase detector frequency and any VCO freq. I get a signal with two close side spurs, which are pretty strong (-30 dBc), for example, at 200 kHz CP freq. and division by 4 (1000 MHz RF output, 50 kHz channel spacing) these spurs are +/-2.5 kHz from carrier, i.e. +/- 10 kHz from VCO frequency (4 GHz).
CP current is set to 5 mA, when I write lower values into the device, spurs get worse and if I set CP current lower than 2 mA, then spurs multiply into several of those.
Spurs do not react to any RF out power and phase settings' changes.
My question is - should evaluation board output signal look like this or I do something wrong?
What might be the nature of these spurs, what would be a way to address this issue?
My band of interest is 960-1030 MHz.
I attach spectrum analyzer screen, for a 1000 MHz signal, 50 kHz span, CP comparison frequency is 200kHz, VCO divided by 4. Spurs are 2.5 kHz apart from signal.
Would appreciate any feedback or advise.