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How to design the matching network of ADL5324 and ADL5523


I am trying to design the tuning the ADL5324 and ADL5523, here is my problem.

Question 1. The Power Amplifier ADL5324 Evaluation Board's default frequency is 2110 MHz - 2170 MHz. But I want it to work at frequency of 3100 MHz - 3400 MHz. Is it possible to simulate the matching network in ADS?  Like the picture shows.

The simulation result seems different from the datasheet. Or maybe I could only modify the component on the board directly?

Question 2. I also want the LNA ADL5523 evaluation board to work at frequency of 3100 MHz to 3400 MHz. As it is a LNA, we want to tune it for optimal noise figure.  But it seems impossible to simulate it in ADS because I looked the SNP file and there is no data about Noise Figure, Fmin, GAMMA OPT. Could anyone tell me how to design the matching network?

Any advice would be apprciate.

Thank you!


  • Hi Chris,

                     There is a discrepancy at higher frequencies between the simuled results and the actual results with the ADL5324 S-Parameter model. ( I have not been able to resolve this issue) The shift is about 240 MHz. If were to shift your simulation frequency up 240 MHz, simulate your match and then build your circuit on your board, the frequency response would at your desired frequency.

    Regarding the ADL5521, There are no noise parameters available. Based on the information in the datasheet an acceptable match can be determined for your frequency. See the attached file.

  • Hello, Jim.

    Thanks for your suggestion.

    I did the simulation again as you told me and I have gotten 3 simulation results. The first one is the simulation at frequency 3.1GHz to 3.4GHz(matching at 3.25GHz), the second one is the simulation at frequncy 3.34GHz to 3.64GHz(matching at 3.49GHz), and the third one is the simulation at frequency 3.1GHz to 3.4GHz(matching at 3.1GHz). You can see it in the attachment.

    It seems there is not any diffrence between result 1 and result 2. And the result 3 looks better than result 1. Besides, in all the three simulation the value of  the C1, C2, and their distance to the pin are different from the data given in the datasheet. So I don't know which one is the correct simulation result that I could implement. And there is no S parameter at this frequency in the datasheet that I could refer to.

    Could you give me any advice?

    Thank you very much.

  • Hi Chris,

                    I would build simulation #2. This is based on my experience witht the error in the model. The S-Parameters posted in the datasheet are a subset of the S-Parameters from the S2P file posted on the web.

    The evaluation board material is IS410 and hasa dieelctric of 4.66. It looks like you are using 3.66. This could explain for some of the descrepancy.

  • Hello, Jim

    Thank you for your suggestion last time.

    Now I am trying to implement ADL5324 and ADL5523 on my own board. As I have gotten some useful values of

    the matching network from the evaluation board, I want to use the same substrate as the evaluation board. From

    the datasheet, I have known the substrate is a four-layer FR4 material. But I don´t know the the thickness of each

    layer and the copper. Could you give me some detailed information about the substrate. Thank you very much.


  • Hi Chris,

                The attached document contains the copper thicness and board material thickness for the ADL5324 and ADL5523.

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