Digital RF bandpass filter for FM radio translators

Hello,

There was no response to this problem in DSP, so I thought maybe someone involved with RF or software-defined radio might be able to help.

Our public radio station uses an FM translator to receive a 91.5 MHz signal and rebroadcast it at 106.7 MHz.  The problem is that there is a nearby station on 91.1 MHz causing interference, and our RF analog bandpass filter skirts are only -10 dB down at that frequency.  Using multiple tuned RF filters in series helps, but the filter response of our cavity filters vary too much with temperature.

Is it possible to implement a digital RF bandpass filter for this?  It wouldn't need to be tuned, and I was wondering if it's possible to apply a (FIR?) 500 kHz bandpass filter at 91.5 MHz.  I think we'd need to sample at 275 MHz, and our 91.5 MHz analog bandpass filter could function as the anti-alias filter.  Since our translator/amplifier input is 91.5 MHz, is it possible to do this at RF, without any downconversion and upconversion to/from baseband?

Does Analog Devices have a demo board that can do this?  I started looking at software-defined radio systems, but don't know if any can receive and transmit at 91.5 MHz simultaneously.

Thanks,

Doug

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  • 0
    •  Analog Employees 
    on Oct 15, 2014 12:53 AM

    Hi, Doug,

        The requirements may not be as stringent as I first envisioned!  A 12-bit RF ADC-DAC system should be able to provide 70+ dB of dynamic range at Nyquist, and much better once the BW is decimated down to 400 kHz.  So a line up as below may work:

        Cavity Filter - LNA - VGA - ADC - Digital Filter FPGA - DAC - Filter

    where the Digital Filter block includes Decimation, FIR filtering, and up-sampling.  Please double check my assumptions below:

        Input power (within pass band of the filter) ~= -75 dBm (40 uV)

        Gain required ~= 1/(12*40u) = 2096 => 66 dB,

                to convert 40 uVrms of random signal to 1 Vpp for ADC

        Fsamp(input) = 250 MHz

        Decimation ratio = 32 => Fsamp(output) = 7.8 MHz, i.e. > 8x oversampling

    Suitable ADI components would include:

      LNA - ADL5545 (among others) x 2

      VGA/Driver - ADL5101

      ADC - ADL9634-250 (12-bit 250 MS/s)

      FPGA - ADI does not make FPGA's, but some evb's have them

      DAC - AD9753 (12-bit 300 MS/s)

      Output filter - may need to be a cavity filter, or a dielectric resonator could work

    The parts cost would be much higher than an analog implementation.  But since you are looking at small quantities (1 or 2 ?), development cost would outweigh parts cost.  The filter you need is probably a bandpass with 250kHz 0.5 dB passband and 33 dB suppression at 400 kHz.  You may want to repost this on the high-speed ADC forum, and see if they may have an evb that already has an appropriate FPGA on, or even a bandpass sigma-delta ADC that would do the job.   Digital filtering is outside the scope of this forum and my expertise.

    Benjamin

Reply
  • 0
    •  Analog Employees 
    on Oct 15, 2014 12:53 AM

    Hi, Doug,

        The requirements may not be as stringent as I first envisioned!  A 12-bit RF ADC-DAC system should be able to provide 70+ dB of dynamic range at Nyquist, and much better once the BW is decimated down to 400 kHz.  So a line up as below may work:

        Cavity Filter - LNA - VGA - ADC - Digital Filter FPGA - DAC - Filter

    where the Digital Filter block includes Decimation, FIR filtering, and up-sampling.  Please double check my assumptions below:

        Input power (within pass band of the filter) ~= -75 dBm (40 uV)

        Gain required ~= 1/(12*40u) = 2096 => 66 dB,

                to convert 40 uVrms of random signal to 1 Vpp for ADC

        Fsamp(input) = 250 MHz

        Decimation ratio = 32 => Fsamp(output) = 7.8 MHz, i.e. > 8x oversampling

    Suitable ADI components would include:

      LNA - ADL5545 (among others) x 2

      VGA/Driver - ADL5101

      ADC - ADL9634-250 (12-bit 250 MS/s)

      FPGA - ADI does not make FPGA's, but some evb's have them

      DAC - AD9753 (12-bit 300 MS/s)

      Output filter - may need to be a cavity filter, or a dielectric resonator could work

    The parts cost would be much higher than an analog implementation.  But since you are looking at small quantities (1 or 2 ?), development cost would outweigh parts cost.  The filter you need is probably a bandpass with 250kHz 0.5 dB passband and 33 dB suppression at 400 kHz.  You may want to repost this on the high-speed ADC forum, and see if they may have an evb that already has an appropriate FPGA on, or even a bandpass sigma-delta ADC that would do the job.   Digital filtering is outside the scope of this forum and my expertise.

    Benjamin

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