I'm using the HMC1031 to lock a Crystek CVHD-950 100MHz VCXO to a 10MHz OCXO and it all works great, including the lock detect output.

In a new product I'm using the same circuit to lock a TVLD410 100MHz Connor Winfield VCTCXO to an optional 10MHz reference input. Because the 10MHz reference may not be present a VCTCXO is used for better frequency stability, +/- 1ppm. The circuit locks okay within the available tuning range, but the lock detect output does not go to a steady lock state. It only momentarily shows a lock condition when the 10MHz frequency is slightly changed and the tuning voltage re-adjusts.

The TVLD410 fits on the same 9x14mm footprint, and changing only the 100MHz oscillator to the CVHD-950 causes the lock output to work fine.

One difference between the two is the tuning sensitivity of the Vtune input. The CVHD-950 input is 2.5kHz/volt and the TVLD410 is 1.05kHz/volt. Both types run off a 3.3v supply. The 100MHz output level is very close to the same. I have tried unsuccessfully adjusting the loop filter values, and also filtering the 100MHz output to remove harmonics.

Anyone got any ideas? This is very puzzling.


The TVLD410 is not on the web. TVLD646-100 is very close:

I'll try attaching the datasheet.

  • 0
    •  Analog Employees 
    on Dec 18, 2014 9:39 PM

    Leakage current through the loop filter capacitor may cause this problem. 

    Our lock detector measures the phase offset between the PFD reference clock edge and divided VCO edge.  If these two edges are both within 3ns the part indicates lock.

    Any leakage current on the CP output causes a phase offset.  The HMC1031  charge pump uses a 50uA current source to reduce component size for a given loop filter BW.   The maximum leakage with 50uA charge pump and 10MHz reference is:

    x/50uA = 3ns/100ns --> x=1.5uA.

    The phase offset due to leakage currents will cause an out of lock indication even when locked.  I suspect the lower Kv TVLD410 part requires a larger Vtune voltage.  Larger voltages across the loop filter capacitor increase leakage current causing the lock detector to fail.  Try some low leakage capacitors or use a capacitor with lower voltage rating.

  • Hi Dyoung1,

    Thankyou for your helpful reply. I was pleased to actually get a reply, and so quickly.

    The HMC1031 circuit is intended to lock the 100MHz VCTCXO to a 10MHz OCXO input

    The leakage on the CP output is part of the problem. I replaced the SMT tantalum capacitor (C9 in the HMC1031 datasheet circuit) with a 100nF polyester cap. This was the largest poly value I had available. Also I fitted another 100nF poly cap for C8 and a 5k6 for R7. (100Hz loop BW values in datasheet.) We have a lock LED driven by a digital transistor on the LD output.

    The lock LED came on indicating lock for a small range of input frequencies and tuning voltage.

    The experiment results are below. The 100MHz remained locked over a much wider range, by observing the 100MHz and 10MHz signals.

    Before we started using the HMC1031 we used a circuit which divided the 100MHz to 50MHz, then the 50MHz to 5MHz. The 10MHz was divided to 5MHz and the 2 signals fed into a 74HCT7046. With this circuit it doesn't care whether the Crystak or the Connor Winfield oscillator is used. The lock output works. The HMC1031 replaced several parts, and is fine in the product using the Crystek oscillator.

    The HMC1031 and TVLD410 is a bad combination for some reason.

    I am away until Jan. 12th, so I wish you a happy Christmas and New Year 2015.



    Ref input Freq.  Vtune   Lock LED    100MHz locked.

    9.99980MHz        0.06v    off            No

    9.99981              0.16      off            Yes

    9.99992              1.25    flashing       "

    9.99993              1.36     On            "

    9.99995              1.55     On            "

    9.99996              1.65    flashing      "

    9.99997              1.75     off             "

    10.00011            3.12     off             "

    10.00012            3.12    flashing      No

  • 0
    •  Analog Employees 
    on Jan 13, 2015 2:18 AM

    With your loop filter component values HittPLL  predicts an unstable phase margin of only 4.3 degrees. This could explain the flashing lock indicator.  Replacing C8, C9 and R7 with the recommended "100MHz output" values from the datasheet will set the loop BW to 17Hz with 65 degree margin.

    The Vtune input on the TVLD410 is another source of leakage.  You can add a 90Kohm series resistor at Vtune to reduce this leakage.

  • 0
    •  Analog Employees 
    on Aug 2, 2018 2:51 PM
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin
  • Hello kevbond01,

    We are trying to lock HMC1031 with CVHD-950. But we cannot get the lock.

    Is it possible to share your working card schematic?

    So that we can use the same for our design.

    Best regards,