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HMC679 reset pin

Creating a design with the HMC679 F/F and want to use the reset input to control ( inhibit / enable ) the toggling.

This will be a DC control signal, but there is no info about required input signal levels / voltages / currents / recommended circuits to do this. The EVAL board schematic shows nothing, also.

  • hi pelican2,

    The datasheet specifies that the HMC679LC3C are Current Mode Logic (CML) logic levels but I guess it needs to be more clear and improved.  I have attached the application note which describe in details this versatile I/O interface in section 3.  Figure 3.2,3.3 give you the min.max levels of the CML Input.  For full speed of 26GHz,the I/O should be interfaced with widely used advance 1.2V CML FPGA's. Section 4 of the document gives all possible interface circuits to different I/O standards.

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