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HMC1061LC5



		

			

									
					    Ning
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on May 8, 2015 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Hi,
    
 
      
  
    1. Is the absolute maximum input for INP still +10dBm if the input is driven single-endedly with INN terminated in 50 ohms?
      2. 
  
    2. is the sampling transfer function in the datasheet a plot of the peak amplitude at the output vs the input frequency? with THA+ADC setup, the 3dB bandwidth of the frequency response from ADC was only abt 8GHz. Across the 18GHz, the gain dropped about 5.5dB. what could be the cause?
      3. 
 
    
 
    Thank you.
    
									
			        
		
    

				
						
        

		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    
















    
	
    
	
    
					



			








	
	
	
	



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                on May 12, 2015 5:48 AM
            
            
					
        
	
        

		
		
        
					
        Hi,
        
 
        1. if the input amplitude is maintained at some lower voltage, will it affect the performance?
        
 
        2. I am only using CLKA with CLKB terminated, will this degrade the performance?
        
 
        3. May I know how do you generate the differential signal for the HMC1061?
        
 
        4. If the device is operated with singel eneded drive, how much is the performace degraded?
        
 
        Thanks.
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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                on May 12, 2015 5:48 AM
            
            
					
          
	
          

		
		
          
					
          Hi,
          
 
          1. if the input amplitude is maintained at some lower voltage, will it affect the performance?
          
 
          2. I am only using CLKA with CLKB terminated, will this degrade the performance?
          
 
          3. May I know how do you generate the differential signal for the HMC1061?
          
 
          4. If the device is operated with singel eneded drive, how much is the performace degraded?
          
 
          Thanks.
          
			
          

		
			
	      

		
		
	
          
	
          
		
          
			
		
          
	
          
	
          
		
						
						
				
						
				
				
		
		
          
			
		
          
	
          

          

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