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Why am I unable to repeat the phase alignment between RFin and REFin using the ADF4106?

I an using "Analog Devices Int-N PLL Software" with the USB interface to control an ADF4106.  Is it possible to achieve the same phase relationship between the RFin and REFin signals for a given set of device settings after power-cycling the ADF4106 and VCO?

I have tried the "Initialization Latch Method" and the "Counter Reset Method" as described in the ADF4106 data sheet.  It seems that for frequency settings where RFin is not a multiple of REFin the resulting phase relationship is always different after power-up.  I was expecting that the internal reset pulse or the counter reset operation would ensure that a consistent phase relationship would result.  It does not.  In fact, any counter reset that is executed results in a different phase relationship for the cases where RFin is not a multiple of REFin.  Am I missing something?

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  • I have added a D-type flip-flop to the PLL circuit to synchronize the LE to the REF signal.  I have confirmed that the LE is synchronized to the REF signal using an oscilloscope.  I have also confirmed that the PLL cannot be programmed when the REF signal is removed.  I am still measuring different phase relationships between the RFin and REFin after the counters are reset with all other settings unchanged.  The circuit behavior has not changed in this regard.  Please note that consistent phase relationships do result if the RFin setting is an integer multiple of the REFin frequency.  This was also true before the flip-flop was added.

    What are the other possible causes of the phase relationship inconsistencies?

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  • I have added a D-type flip-flop to the PLL circuit to synchronize the LE to the REF signal.  I have confirmed that the LE is synchronized to the REF signal using an oscilloscope.  I have also confirmed that the PLL cannot be programmed when the REF signal is removed.  I am still measuring different phase relationships between the RFin and REFin after the counters are reset with all other settings unchanged.  The circuit behavior has not changed in this regard.  Please note that consistent phase relationships do result if the RFin setting is an integer multiple of the REFin frequency.  This was also true before the flip-flop was added.

    What are the other possible causes of the phase relationship inconsistencies?

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