In case of Parallel mode what termination is required to RFBUFEN pin? Because RF output is set to +3dBm when in Parallel Mode, RFBUFEN pin does nothing I think.
The RFBUFEN input (pin 30) should be driven with a valid "0" or "1" CMOS level. By default when RFBUFEN="1" the CML output (RFOUTP/N) is enabled. The PMODE-SEL="1" input enables parallel mode. In this mode the three SPI signals (SCK, SDI, and SEN) are decoded to enable/disable the 8 LVPECL outputs as shown on page 14 of the datasheet. Parallel mode also sets the CML output gain to a constant 3dBm.