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ADIsimpll

HMC703       vco use HMC531 in the library

pfd 50M     out  frequency  12.8~14.2G

Question1:whatever parameter(loop filter)  i choose,  i can't lock to 10Hz,unless i choose lock to single frequency

Question2:i choose different  OPA ,like AD820 it can lock to 10 degree,but if i change AD820,using AD797 instead,it can't lock to 10 degree

  • I'm assuming you are using Version 4.1x.xx (see Help / About), if not you should upgrade. Using V4.0 you may have problems with the CP offset current which is on by default. To turn it off, go into the left panel, expand the Chip folder then expand the Phase Detector entry and set I Offset to 0.

    Assuming that is not the problem, doing that design, if you choose an ideal op-amp you have to extend the simulation time to see locking to 10Hz. For the default loop bandwidth of 5MHz, it locks to 10Hz in about 1.2us. You can extend the simulation time in the TimeDomain folder on the left panel, expand that and change the value of Stop Time.

    If you choose the AD797 then the high bias currents (250nA) cause significant reference spurs, which in the time domain is frequency modulation around 1MHz p-p.  The AD820 has lower bias currents (2pA), which causes reference spurs equivalent to about 10Hz p-p FM.

  • Make sure the 'Offset Dir' parameter (under the Phase Detector heading) is set to 'OFF'

  • This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin