PHEMT bias sequencing circuit


I'm system engineer, so don't know well about PHEMT or HEMT chip.

I'd like to use HMC598 and HMC-ALH382, HMC-ALH476 like doubler or AMP.

These chips are required some bias sequence.

You can find PDF file about bias

//Design and Implementation of a Bias Sequencing Circuit for the HMC463LP5 Low Noise Amplifier//

that circuit is method how to make proper bais sequence.

They say VGG should be turned on than VDD.  I understood it and It did good.

But, when VGG is turned off, is it okay?

I think VDD will be turnd off after VGG. It may be problems.

But that application note notice only tuned off speed by using VDD' capacitor.

Now, I want to know correct bias sequence.

Could I ignore bias when chips are turnd off?