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ADF4360-9 Schematic and PCB

Hello, everyone, we now need to adopt ADF4360-9 to design the phase-locked loop. We refer to the schematic of the evaluation kit, which is ug-106 page 9 and page 10, but some places, we do not understand, first, power supply section, in the schematic, USB 5V voltage generate VDD and VVCO by ADP3300-3, respectively, to DVDD, AVDD and VVCO power, but the strange thing is why use so many 0 ohm resistors, such as R1, R13, R24 , R2 and R27. In addition, PCB in the third page of UG-106 is different with the physical map, there are none of which R39 and D5 in physical map. Also, in reference to the schematic and PCB, hoe to choose the position of R10 in the loop filter part , what position that is on the back? Will the location of the loop filter affect performance of loop filter? Thank you