HMC832 PLL

I’m looking for a PLL with VCO integrated having the following behaviors:

Band: 960MHz to 1220MHz

Pout: +3dBm

Frequency settling time plus writing time of the registers for changing  frequency (time for changing frequancy): <30usec for a hopping  distance equal at 63MHz

Phase noise@1MHz:-140dBm/Hz

Spurious: 60dBc (better if it is 70dBc) 

Step size: 10KHz

Frequency reference: 50MHz

I'd like to know if the HMC832 or the HMC830 can meet the above requarements.

Best regards

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  • 0
    •  Analog Employees 
    on Aug 17, 2016 9:59 PM

    Both HMC830 and HMC832 will meet these requirements but the application must utilize a tunable reference and manual tuning to meet the -60dBc spurious and hop time requirements.  I've attached an appnote on manual tuning.  With a fixed 50MHz reference Figure 21 in the HMC830 datasheet shows at frequencies close to  2GHz VCO frequency (1000MHz output) IBS spurs for some channels near the integer boundary could reach -50dBc.  With tunable reference the spur levels drop below -100dBc.

    Phase noise simulations at 1MHz offset for both parts (1220MHz output) is around -144dBc/Hz using the HMC830 default eval board loop filter.

    Fast_Frequency_Hopping_Application_Note.pdf
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  • 0
    •  Analog Employees 
    on Aug 17, 2016 9:59 PM

    Both HMC830 and HMC832 will meet these requirements but the application must utilize a tunable reference and manual tuning to meet the -60dBc spurious and hop time requirements.  I've attached an appnote on manual tuning.  With a fixed 50MHz reference Figure 21 in the HMC830 datasheet shows at frequencies close to  2GHz VCO frequency (1000MHz output) IBS spurs for some channels near the integer boundary could reach -50dBc.  With tunable reference the spur levels drop below -100dBc.

    Phase noise simulations at 1MHz offset for both parts (1220MHz output) is around -144dBc/Hz using the HMC830 default eval board loop filter.

    Fast_Frequency_Hopping_Application_Note.pdf
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