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How to use for synchronous operation of multiple HMC1190As

Hello,

Our customer would like to use multiple HMC1190As under synchronous output signal. The customer operates by following procedure. Do we need any additional operation or something other procedure for synchronizing multiple HMC1190As?

1) Power on.

2) CHIPEN to Hi

3) Register set to each HMC1190A.

4) CHIPEN to Lo after confirming LD=H

5) CHIPEN to Hi

Best regards,

Akira

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  • Hi Akira,

    The customer can experiment with the assertion time of the CHiP_EN trigger signal (highlighted below) relative to the reference clock. This might help find a sweet spot for DSM load timing on the customer platform. A lower PFD rate makes the timing easier.

     

    1) Power on.

    2) CHIPEN to Hi

    3) Register set to each HMC1190A.

    4) CHIPEN to Lo after confirming LD=H

    5) CHIPEN to Hi

     

    The caveats stated below still apply:

    VCO output divider must be 1;

    R divider must be 1;

    Exact Frequency mode;

    Single reference source distributed to all devices with equal path delays;

     

    The other point to keep in mind is that the Phase Sync feature does not account for imbalances in CP current, offset currents, varying circuit delays and temperature variation that will yield additional phase differences.  The Phase Sync feature only synchronizes the DSM state machine, so measuring the phases and modifying them may still be required.

    Best,

    Sefa

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  • Hi Akira,

    The customer can experiment with the assertion time of the CHiP_EN trigger signal (highlighted below) relative to the reference clock. This might help find a sweet spot for DSM load timing on the customer platform. A lower PFD rate makes the timing easier.

     

    1) Power on.

    2) CHIPEN to Hi

    3) Register set to each HMC1190A.

    4) CHIPEN to Lo after confirming LD=H

    5) CHIPEN to Hi

     

    The caveats stated below still apply:

    VCO output divider must be 1;

    R divider must be 1;

    Exact Frequency mode;

    Single reference source distributed to all devices with equal path delays;

     

    The other point to keep in mind is that the Phase Sync feature does not account for imbalances in CP current, offset currents, varying circuit delays and temperature variation that will yield additional phase differences.  The Phase Sync feature only synchronizes the DSM state machine, so measuring the phases and modifying them may still be required.

    Best,

    Sefa

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