A question about HMC440 Loop Filter

Dear all,

I've been working on a HMC440 PLL with Wenzel 100MHz OCXO as reference, and a very narrow band (Ko = 120kHz/V) VCO runs at 1GHz.

The "Hittite Microwave PLL Design & Analysis Tool Version 1.1" shows the output phase noise is dominated by neither the reference nor the VCO, but the filter (as shown in the following figure, dark green line).

When I look into the "Closed loop Modulated Filter Noise" plot, it suggests the RL and R1 are the dominating sources.

Since the simulation result matches our test result pretty well, and because this -100dBc/Hz@10kHz is really not good as a 1GHz PLL, I just wondering is there way to improve the performance? Shall we change the R1/RL values, although 200 Ohm is suggested on the datasheet? Is there another type of loop filter which is better in doing this job?

Thanks a lot.

Regards,

Wade

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  • 0
    •  Analog Employees 
    on Jan 26, 2017 9:36 PM

    Hi Wade,

    If you haven't already reviewed it I would recommend you review a document I put together awhile back regarding loop filter design using these HMC products that utilize a phase frequency detector output as opposed to a charge pump output.

    R1 and RL must remain at 200 ohms or the gain will suffer or damage may result. These set the 2V swing on the output. One issue I do see is that your phase detector gain is set incorrectly. It should be simply "2" which the software recognizes as 2V. It's currently set as if the PLL uses a charge pump output (2.5mA).

    Using the HMC PLL Design tool for synthesizers with a PFD output

    additional information on the PFD products are located here.

    FAQ: HMC Phase Frequency Detectors

    If you still can't get the performance you need after working through these docs please re-post your *.pll file and your requirements and I'll take a look at it.

    Best Regards,

    Marty

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  • 0
    •  Analog Employees 
    on Jan 26, 2017 9:36 PM

    Hi Wade,

    If you haven't already reviewed it I would recommend you review a document I put together awhile back regarding loop filter design using these HMC products that utilize a phase frequency detector output as opposed to a charge pump output.

    R1 and RL must remain at 200 ohms or the gain will suffer or damage may result. These set the 2V swing on the output. One issue I do see is that your phase detector gain is set incorrectly. It should be simply "2" which the software recognizes as 2V. It's currently set as if the PLL uses a charge pump output (2.5mA).

    Using the HMC PLL Design tool for synthesizers with a PFD output

    additional information on the PFD products are located here.

    FAQ: HMC Phase Frequency Detectors

    If you still can't get the performance you need after working through these docs please re-post your *.pll file and your requirements and I'll take a look at it.

    Best Regards,

    Marty

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