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Hmc829 isolation between analog and digital inside the chip

Hello,

I'm using HMC829 RF PLL evaluation board I run the configuration from examples that Hittite provided,

at the RF output I see some spurious at different places that running through small band =1MhZ when I click on read lock register(12h) with some period between the clicks. I use REF=100[MhZ] and run at 3GhZ at the output. It looks like some isolation problem between analog and digital parts inside the PLL it's important me to say that at same conditions I never met the problem in other  HMC840,HMC838 PLL's.

Please suggest what a solution for this issue cause I want to use this pll in system and run check for lock at least every second.

Thank you. 

  • The eval board software  "check lock" button performs a number of SPI read and write operations which are not actually required for simple lock detection.  Click "Show R/W History" to show the SPI activity window.  

    The check lock operation only requires a single read from the lock detect Reg 0x12  but in fact the software performs a total of 15 SPI read/write cycles. All this activity results in a higher level of digital noise which results in some performance degradation.  You can check the amount of digital noise for a single SPI access using the "SPI read/write 1" button.  This is a better indication of the amount of interference you can expect for a lock check operation issued every second.