I want to simulate with ADIsimPLL the ADF41020 circuit to generate a 12.25 GHz signal. I set the PFD at 50 MHz but there is an error given by ADIsimPLL as you can see here.

I really don't understand why it is not working. I think that the divider can't reach the value of 12.25 GHz/50MHz =  245, but i'm not sure.