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Guidelines for two cascaded amplifers (hmc618a)

Thread Summary

The user asked about cascading two HMC618A amplifiers to achieve over 30 dB gain and whether this could lead to oscillation. The final answer recommended maintaining good RF port matching, isolation between DC bias networks, and following the EVB layout closely. Additional advice included not connecting Vdd1 and Vdd2 too close to the DUT pins and ensuring adequate capacitive bypassing. For stability testing, the engineer suggested measuring S12 and ensuring reverse isolation is at least 15 dB higher than the gain, which is 45 dB in this case.
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Hello everyone,

for our telecom system, we need to cascade two selected amplifers (hmc618a, 1700 - 2200 MHz tuned) in order to obtain more than 30 dB gain.

We thought to follow the datasheet reference design.

Are there some guidelines or issues we have to know to do that? Or Have you some advices?

Could the two cascaded stages oscillate?

Many thanks.

best regards,

Antonio L.

Parents
  • Hi Antonio,

    Yes, for the HMC618A the bypass caps are out past the inductors. When I was talking about the bypass caps I was more thinking about some of our other products that don't have inductors right near the pins but instead have caps very close to the pins with just short lengths of PCB trace between cap and pin. For the HMC618A my recommendation is to follow the top layer layout shown in the gerber files as closely as possible with respect to the positions of the inductors and bypass caps for the Vdd1 and Vdd2 traces, then connect them together out past those caps (i.e. farther away from the part). Once past those caps, you should be able to connect all of the drains together (for both amps in your cascade) without causing problems.

    With most (or possibly all) of our HMC parts we generally recommend to customers that, in order to obtain performance similar to that shown on the data sheet and to increase the chances of first-pass success with their designs, they follow our EVB gerbers as closely as possible. That includes not just the traces but also the grounds and ground vias. Grounds and ground via diameter, quantity, placement, and type (PTH vs. solid/filled, etc.) can have significant effects on both the electrical and thermal aspects of circuit performance. If the thermal considerations are new to you and/or you're interested to learn more about them, here is a link to a relevant application note:

    http://www.analog.com/media/en/technical-documentation/application-notes/thermal_management_for_surface_mount_components.pdf

    If your design uses a different stack-up than our EVB then you might need to make adjustments to some of the trace widths and gaps in order to maintain the same trace impedance. Stack-up differences might also require you to increase your ground via coverage (for thicker substrates) or allow you to decrease your ground via coverage (for thinner substrates). As always with RF design, there are many factors to take into account.

    I'm glad that you found this discussion helpful. Let me know if you have more questions.

    Regards,

    SMcBride 

Reply
  • Hi Antonio,

    Yes, for the HMC618A the bypass caps are out past the inductors. When I was talking about the bypass caps I was more thinking about some of our other products that don't have inductors right near the pins but instead have caps very close to the pins with just short lengths of PCB trace between cap and pin. For the HMC618A my recommendation is to follow the top layer layout shown in the gerber files as closely as possible with respect to the positions of the inductors and bypass caps for the Vdd1 and Vdd2 traces, then connect them together out past those caps (i.e. farther away from the part). Once past those caps, you should be able to connect all of the drains together (for both amps in your cascade) without causing problems.

    With most (or possibly all) of our HMC parts we generally recommend to customers that, in order to obtain performance similar to that shown on the data sheet and to increase the chances of first-pass success with their designs, they follow our EVB gerbers as closely as possible. That includes not just the traces but also the grounds and ground vias. Grounds and ground via diameter, quantity, placement, and type (PTH vs. solid/filled, etc.) can have significant effects on both the electrical and thermal aspects of circuit performance. If the thermal considerations are new to you and/or you're interested to learn more about them, here is a link to a relevant application note:

    http://www.analog.com/media/en/technical-documentation/application-notes/thermal_management_for_surface_mount_components.pdf

    If your design uses a different stack-up than our EVB then you might need to make adjustments to some of the trace widths and gaps in order to maintain the same trace impedance. Stack-up differences might also require you to increase your ground via coverage (for thicker substrates) or allow you to decrease your ground via coverage (for thinner substrates). As always with RF design, there are many factors to take into account.

    I'm glad that you found this discussion helpful. Let me know if you have more questions.

    Regards,

    SMcBride 

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