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ADF4360-0 pins 9/10 (L1/L2) discrepancy


I'm working on a design using the ADF4360-0 synthesizer and VCO.

It's unclear to me what proper termination is for pins 9 and 10 on the IC. The datasheet (Rev. D, table 4) states pins 9 and 10 should be connected to AGND. However, the evaluation board (EV-ADF4360-0EB1Z; UG-095, Rev. B, Figure 9) features a schematic where these pins are labeled L1 and L2, connected to GND via a 470R resistor in parallel with a 3.9nH inductor. The BOM (Table 1) indicates the inductor is not placed, leaving only the 470R resistor.

Can anyone shed some light on these L1/L2 pins? Should they be connected to AGND via a 470R resistor or shorted? If via resistor, what's the expected impact of having them shorted?

To clarify - I have a board where these 2 pins are shorted to AGND as described in the datasheet. The IC is fully functional. However, the output signal is coupling into other parts of the board via the V_VCO or AGND net (not sure which). Changing the 'core power level' has a direct impact on the noise level measured at the VCO output frequency in other parts of the circuit. Other parameters, e.g. charge pump current or output power level have no impact on the measured noise. This leads me to question the L1 and L2 pins which seem to be a return path for the VCO core block (based on the ADF4360-7 datasheet).