HMC6300 output power is around -40dBm even at the highest RF and IF VGA gains.
Voltage at the DET_OUT pin is constant, 0.6V at both highest and lowest gains.
PLL is getting locked.
I'm using 250 MHz Channels Using 71.42857 MHz Reference to generate 58GHz.
Below are the registry settings. Please let me know if some I'm missing something.
read only registers:
INFO: @tx2 = 8f (read) INFO: @tx2 = 0 (read) INFO: @tx2[1a] = 3 (read) INFO: @tx2[1b] = 7 (read) INFO: @tx2[1c] = 0 (read) INFO: @tx2[1d] = 0 (read) INFO: @tx2[1e] = 0 (read) INFO: @tx2[1f] = 87 (read)
I was pulling my hair out with the same issue. At least it forced me to measure all the mmwave interconnects to conclude it must be a **** register issue. Turns out the data sheet is wrong. Register 2 should be 0xF0 instead of 0xFC. Specifically the bit 3 (pa_sep_pa_pwrdn_fast) should be active low for normal operation, not active high as listed in revision C of the data sheet.
Come on ADI! Documentation for this part SUCKS! See my other thread for PLL issues. This is uncharacteristic of ADI or the old Hittite. I used to be able to call Hittite and get someone on the phone. Now it's just forums and web forms into a black hole. Had to use of GUI photos in the development board documentation to compare register values. The GUI register settings are not even the recommended settings in the data sheet.
This supports my observation. An external diode power detector did only react when row2 bit 2 and bit 3 is zero.